Memory Device Reading Method Reducing Disturbance
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Solution Overview
Problem
Flash memory cells experience data integrity issues due to reading disturbances, where the increased reading time affects adjacent memory cells, leading to incorrect data storage as the number of charges in unselected cells changes.
Innovation Solution
A memory device and reading method that utilize different bit line voltages during first and second reading periods to determine whether memory cells have entered a preset state, with a control circuit providing distinct voltages to selected and unselected word lines to minimize reading disturbance and maintain data accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If reading time is increased to read multiple memory cells, then reading completeness is improved, but data integrity of unselected cells deteriorates due to reading disturbance
Solution Approach 1:
The patent divides the reading process into multiple separate reading periods (first reading period, second reading period, etc.) rather than performing all reads in a single continuous operation. This segmentation allows the system to apply different bit line voltages to different groups of memory cells during different time intervals, thereby completing comprehensive reads while protecting unselected cells from reading disturbance in each segment.
Solution Approach 2:
The patent applies preliminary protective actions by setting specific bit line voltages for unselected memory cells before reading operations are performed on selected cells. During each reading period, the control circuit pre-configures protective voltages on bit lines connected to unselected cells, preventing charge disturbance before it can occur during the reading of other cells.
2Measurement precision
If multiple reading periods are used to read all memory cells, then reading completeness is improved, but reading time increases
Solution Approach 1:
The patent employs periodic reading actions by organizing reads into distinct reading periods where different groups of memory cells are read in sequence. Each period focuses on specific selected cells while protecting unselected cells, allowing comprehensive reading to be achieved through systematic periodic operations rather than continuous reading of all cells simultaneously.
Solution Approach 2:
The patent applies partial reading actions in each period by selectively reading only certain groups of memory cells during each reading period rather than attempting to read all cells simultaneously. This partial action approach, when repeated across multiple periods, achieves complete reading coverage while reducing the time burden of any single reading operation.
Data Source
AI summary
A memory device and a reading method thereof are provided. During a second reading period, a second bit line voltage is provided to a bit line having a read finished memory cell. Thus, a voltage difference between a bit line voltage and a pass voltage of memory cells on unselected word lines is reduced. A data value stored in the memory cells on a selected word line is determined according to whether the memory cells on the selected word line enter a preset state during a first reading period and the second reading period.