Memory Reading Method Using Partial Address Pre-Charging
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Solution Overview
Problem
Current memory reading methods face delays due to the need for precise address determination and synchronization with clock signals, which can be inefficient, especially at high frequencies, as they require sequential processing of memory cells.
Innovation Solution
A method involving pre-charging of memory cells using a sense amplifier, where partial addresses are used to pre-charge sets of words, allowing for simultaneous reading of multiple cells based on the known parts of the address, reducing the delay by maintaining pre-charge only for the relevant cells during the reading process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If sequential processing of memory cells is used with precise address determination, then reading accuracy is improved, but reading time increases
Solution Approach 1:
The patent applies preliminary action by pre-charging multiple memory cell sets in advance based on partial address information before the complete address is available. This allows the memory system to prepare multiple potential candidates simultaneously, so that when the complete address is received, the desired data can be read immediately without sequential processing delays.
Solution Approach 2:
The patent segments the address into partial address components that can be processed independently. By dividing the address determination process into segments (partial address matching), the system can pre-charge multiple cell sets in parallel based on different address segments, thereby reducing the overall reading time while maintaining precise address determination.
2Speed
If pre-charging of multiple word sets is performed, then reading speed is improved, but energy consumption increases
Solution Approach 1:
The patent applies partial action by pre-charging only the necessary portions of memory cell sets that match the partial address criteria, rather than pre-charging all possible cell sets. This selective pre-charging approach maintains high reading speed by preparing relevant candidates in advance while minimizing energy consumption by avoiding unnecessary pre-charging of irrelevant cell sets.
3Productivity
If floating terminal configuration is used during pre-charging, then pre-charging efficiency is improved, but circuit complexity increases
Solution Approach 1:
The patent applies dynamics by making the first terminal of memory cells configurable - floating during pre-charging operations and connected to reference voltage during normal read operations. This dynamic reconfiguration allows the same circuit structure to serve multiple functions: enabling efficient pre-charging when floating and ensuring proper reference levels during standard reads, thereby improving pre-charging efficiency without permanently increasing circuit complexity.
Data Source
AI summary
The present disclosure relates to a method of reading a word in a memory device, wherein the word is comprised in a first set of words that can be read by the memory device, each word of the first set comprising at least one byte of data, each word being contained in memory cells, the method comprising a pre-charging step during which the first set and at least a second set of words are pre-charged, a first terminal of each cell of the first and second sets being floating during the pre-charging step.