Memory Cell Readout Using Neighbor-Aware Dynamic LLR Decoding
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Solution Overview
Problem
Memory devices face degradation in readout performance due to factors like programming and erase cycles, aging, and retention drift, which existing methods fail to adequately address, especially when memory cells are affected by neighboring cells.
Innovation Solution
The system calculates dynamic Log Likelihood Ratio (LLR) values based on neighbor programming levels, classifying memory cells into cell-groups and using these values for soft decoding to improve readout accuracy, rather than relying on pre-defined LLR tables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional readout methods are used without considering neighboring memory cells, then the readout process is simple and fast, but readout performance degrades due to interference from neighboring cells
Solution Approach 1:
The patent segments the memory array into target memory cells and neighboring memory cells, applying different readout procedures to each segment. Target cells are read using dynamic LLR values that account for neighbor interference, while neighbor cells are read separately to determine their programming levels. This segmentation allows selective application of complex interference compensation only where needed.
Solution Approach 2:
The patent performs preliminary reading of neighboring memory cells before reading target memory cells. The neighbor readout results are used to calculate dynamic LLR values that are then applied during target cell readout. This preliminary action enables the system to compensate for interference effects before they degrade the target readout performance.
2Measurement precision
If dynamic LLR values are calculated for each neighbor programming level, then readout accuracy improves, but calculation complexity and processing time increase
Solution Approach 1:
The patent applies different LLR values locally to different groups of target memory cells based on their specific neighboring cell programming levels. Each target cell group receives customized dynamic LLR values calculated from its particular neighbor configuration, rather than applying a single universal LLR value to all cells. This local quality approach maximizes readout accuracy for each cell group while managing overall complexity.
Solution Approach 2:
The patent dynamically changes the LLR parameter based on the programming levels of neighboring memory cells. Instead of using fixed or pre-defined LLR values, the system calculates and adjusts LLR values in real-time according to the actual neighbor state. This parameter adaptation enables accurate compensation for varying interference conditions across different memory regions.
3Measurement precision
If multiple read thresholds are used to read the same data page multiple times, then more accurate LLR values can be derived, but readout time increases
Solution Approach 1:
The patent employs periodic reading of the same data page using different read thresholds to gather multiple measurements. These periodic reads at different threshold levels provide diverse information about the memory cell states, enabling more accurate derivation of LLR values. The periodic action is performed systematically across multiple read cycles with varying threshold configurations.
Solution Approach 2:
The patent performs a limited number of repeated reads (Ns times) with different threshold sets rather than exhaustive reading. This partial action approach derives sufficient LLR value accuracy from a manageable number of reads, balancing the need for precision with the constraint of readout time. The system performs enough reads to achieve acceptable accuracy without excessive time consumption.
Data Source
AI summary
A storage device includes circuitry and memory cells that store data in Np programming levels of threshold voltage values. The circuitry defines NRv threshold-sets, each includes Ns read thresholds that define Ns+1 zones, produces Ns readouts by reading, from a target WL, using the NS read thresholds, a target page that was stored encoded using an Error Correction Code (ECC), and produces a reference readout by reading the target page using optimal read thresholds. The circuitry identifies Np programming levels of memory cells in a neighbor WL for classifying target cells in the target WL into Np·NRv cell-groups. The circuitry calculates, per zone, Np LLR values, for the respective Np programming levels, based on the reference readout, the Ns readouts and the classification, assigns the LLR values to the target cells, and recovers the target page by applying to the assigned LLR values soft decoding for decoding the ECC.