Memory Readout Error Signaling With DQS Pulse Interruption
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Solution Overview
Problem
Conventional semiconductor memory devices cannot easily identify the specific content of errors in output data, such as whether the error is correctable or uncorrectable, beyond indicating the presence of an error.
Innovation Solution
A semiconductor memory device is designed with a memory cell array, an error detection and correction circuit, and an input/output circuit. The error detection and correction circuit detects error bits and generates an error detection signal, while the input/output circuit outputs a data strobe signal with pulses for correctable errors and stops pulses for uncorrectable errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an error detection signal is generated to indicate the presence of errors, then error detection capability is improved, but the ability to identify specific error content (correctable vs. uncorrectable) remains insufficient
Solution Approach 1:
The patent segments the error detection mechanism into two distinct signaling components: an error detection signal (ERR) that indicates the presence of errors, and a data strobe signal (DQS) whose pulse pattern conveys additional information about error correctness. By dividing the error information communication into separate channels, the system preserves both general error detection and specific error content identification capabilities.
Solution Approach 2:
The patent utilizes the periodic pulse structure of the data strobe signal to encode error information. When correctable errors are detected, pulses are generated at regular intervals corresponding to data bits; when uncorrectable errors are detected, the pulse pattern is interrupted or stopped. This periodic action with conditional interruption provides a clear temporal signature that distinguishes between correctable and uncorrectable error conditions.
2Reliability
If conventional error detection signals are used, then error presence is indicated, but external devices cannot distinguish between correctable and uncorrectable errors
Solution Approach 1:
The data strobe signal serves as an intermediary carrier that transmits error classification information from the memory device to external devices. Instead of requiring external devices to directly analyze error patterns or use complex decoding, the strobe signal's pulse pattern acts as a simplified intermediary representation that directly encodes whether errors are correctable or uncorrectable, making external device operation easier.
Solution Approach 2:
The patent uses the presence or absence of pulses in the data strobe signal as a visual-like distinction (analogous to color changes) to indicate different error states. When pulses are present, it indicates correctable errors; when pulses are stopped or absent, it indicates uncorrectable errors. This binary visual distinction makes error classification immediately recognizable to external devices without requiring complex signal analysis.
Data Source
AI summary
A semiconductor memory device that can easily recognize the content of errors in data is provided. The semiconductor memory device includes a memory cell array, an error detection and correction circuit, and an input/output circuit. The memory cell array includes a plurality of memory cells. The error detection and correction circuit detects and corrects error bits included in the data output by the memory cell array. The error detection and correction circuit activates an error detection signal when the data includes a correctable error bit. The input/output circuit stops the clocking of the data strobe signal output with data when the data includes uncorrectable error bits.