Memory Receiver Logic Conversion for JEDEC Strobe Compliance

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Solution Overview

Problem

Conventional memory systems face malfunctions due to data strobe signals violating the JEDEC memory standard during the standby stage, causing incorrect voltage levels that lead to memory circuit errors.

Innovation Solution

A memory system with a receiver that includes a logic conversion circuit to convert data strobe signals from the same voltage level to different levels, adhering to the JEDEC standard, ensuring proper operation of memory chips and circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional controllers output data strobe signals during standby stage, then the controller can maintain basic functionality, but the data strobe signals violate JEDEC memory standard and cause memory circuit malfunctions

Engineering Contradiction:
Improvecontroller functionalityVSAvoidmemory circuit operation
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

A logic conversion circuit is introduced as an intermediary component between the controller and memory circuit. This circuit receives the data strobe signals from the controller, converts them according to JEDEC standards, and outputs corrected signals to the memory circuit. The intermediary handles the voltage level conversion and signal conditioning, allowing the controller to maintain its simple operation while ensuring reliable memory circuit operation through standardized signals

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If data strobe signals are output at same voltage level during standby, then controller operation is simplified, but memory circuit cannot properly distinguish signal levels causing errors

Engineering Contradiction:
Improvecontroller designVSAvoidvoltage level distinction
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The signal processing function is segmented into two distinct parts: the controller generates data strobe signals with simplified voltage levels, while the logic conversion circuit separately handles the voltage level differentiation required by the memory circuit. This segmentation allows the controller to remain simple while the signal conversion task is delegated to a dedicated circuit that specializes in voltage level distinction and JEDEC standard compliance

Inventive Principle:
Principle #1Segmentation

3Reliability

If logic conversion circuit is added to convert voltage levels, then JEDEC standard compliance is achieved, but device complexity increases

Engineering Contradiction:
ImproveJEDEC standard complianceVSAvoidreceiver structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The logic conversion circuit is designed to automatically detect the voltage levels of incoming data strobe signals and perform self-adjusting conversion to meet JEDEC standards. The circuit monitors its own input conditions and autonomously applies the appropriate conversion logic without requiring external control or configuration, thereby achieving standard compliance while minimizing the complexity of control mechanisms

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12499928B2Memory system and receiver
Publication Date: 2025.12.16 NAN YA TECH
  • US12499928B2 patent drawing
  • US12499928B2 patent drawing
  • US12499928B2 patent drawing

AI summary

A memory system includes a controller and a memory circuit. Controller outputs a first data strobe signal and a second data strobe signal. Memory circuit is coupled to controller, and is configured to receive first data strobe signal and second data strobe signal. Memory circuit includes a receiver. Receiver includes a logic conversion circuit. Logic conversion circuit is coupled to controller. When first and second data strobe signal are at the same voltage level, logic conversion circuit is configured to convert first second data strobe signals into third and fourth data strobe signals. Third data strobe signal and fourth data strobe signal converted by logic conversion circuit are at different voltage levels. When first and second data strobe signals are at different voltage levels, logic conversion circuit is configured to pass first and second data strobe signal and as third and fourth data strobe signals.