Memory Device Recover Circuit De-traps Charges
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Solution Overview
Problem
Memory units or cells in memory devices experience performance degradation after a certain number of program/erase cycles due to unpredictable charge trap induced by strong electric fields, leading to issues like threshold voltage shift and transconductance degradation.
Innovation Solution
The implementation of a recover circuit in memory devices that applies a stronger electric field across the gate and source/drain terminals of memory cells during a recover operation to de-trap trapped charges and restore performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If strong electric field is applied across gate and source/drain terminals during program/erase cycles, then program/erase operation is achieved, but charge trap is induced causing performance degradation
Solution Approach 1:
The patent applies a strong electric field during recover operations to de-trap charges that were previously trapped during normal operation. The harmful trapped charges are converted into removable entities by applying a reverse polarity strong electric field, thereby restoring device performance without requiring physical replacement of memory cells.
Solution Approach 2:
The patent implements periodic recover operations between normal program/erase cycles. The recover circuit is activated at specific intervals to apply strong electric fields that de-trap charges, creating a periodic maintenance routine that prevents cumulative performance degradation while allowing continuous normal operation.
2Reliability
If recover operation with strong electric field is applied, then trapped charges are removed, but device complexity increases
Solution Approach 1:
The recover circuit shares the same gate and source/drain terminals with the normal memory cell, utilizing existing device structures for dual purposes. The same physical terminals that perform program/erase operations also serve as the interface for recover operations, eliminating the need for separate dedicated recover terminals or structures.
Solution Approach 2:
The memory cell performs its own recovery by applying strong electric fields through its own gate and source/drain terminals. The recover circuit provides the necessary voltage signals, but the actual de-trapping process occurs within the memory cell itself using its inherent structure, reducing the need for external complex recovery mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The recover circuit effectively addresses performance degradation by removing trapped charges, thereby extending the lifespan and improving the performance of memory cells.
Implementation Method 1
applies a stronger electric field across the gate and source/drain terminals of memory cells during a recover operation to de-trap trapped charges
Data Source
AI summary
A memory device including a memory array, a driver circuit, and a recover circuit is provided. The memory array includes multiple memory cells. Each memory cell is coupled to a control line, a data line, and a source line and, during a normal operation, is configured to receive first and second voltage signals. The driver circuit is configured to output at least one of the first voltage signal or the second voltage signal to the memory cells. The recover circuit is configured to output, during a recover operation, a third voltage signal, through the driver circuit to at least one of the memory cells. The third voltage signal is configured to have a first voltage level that is higher than a highest level of the first voltage signal or the second voltage signal, or lower than a lowest level of the first voltage signal or the second voltage signal.