3D Memory Device Recovery Electric Field Lateral Charge Migration

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Solution Overview

Problem

Lateral charge migration in 3D vertical memory structures is a critical reliability issue due to the sharing of charge trapping layers among adjacent memory cells, which increases with the number of program/erase cycles.

Innovation Solution

A memory device and method that involve performing a first operation for m times and a second operation for n times, where m is equal to or larger than n, to produce a first and second electric field in the memory layers. The second electric field, with a different field direction, is used as a recovery electric field to suppress lateral charge migration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If physical separation of charge trapping layer is implemented to suppress lateral charge migration, then reliability is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improvememory device reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the electrical parameters (applying reverse electric fields) rather than modifying the physical structure (separating charge trapping layers). This approach suppresses lateral charge migration by altering the electrical conditions during operation, avoiding the need for complex manufacturing process modifications while improving reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/physical approach (physical separation of layers) with an electrical approach (applying reverse electric fields). This substitution allows suppression of lateral charge migration through electrical means rather than structural modification, thereby maintaining manufacturing simplicity while achieving reliability improvement

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Quantity of substance

If number of program/erase cycles increases to improve memory capacity, then storage capability is improved, but lateral charge migration increases

Engineering Contradiction:
Improvememory capacityVSAvoidthreshold voltage stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent implements periodic reverse electric field operations between or during program/erase cycles. This periodic action resets or mitigates the lateral charge migration that accumulates with each cycle, allowing the memory device to maintain threshold voltage stability even as the number of program/erase cycles and memory capacity increase

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively suppresses lateral charge migration by using a recovery electric field to recover charges back to their initial positions, thereby improving the reliability of the memory device without complicating the manufacturing process.

Implementation Method 1

In the first operation, a first electric field is produced in a portion of the memory layers. The word lines are configured for producing a second electric field in the second operation in the portion of the memory layers, and a field direction of the second electric field is different from a field direction of the first electric field.

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS12321607B2Memory device and method for operating the same
Publication Date: 2025.06.03 MACRONIX INTERNATIONAL CO LTD
  • US12321607B2 patent drawing
  • US12321607B2 patent drawing
  • US12321607B2 patent drawing

AI summary

A memory device is provided. The memory device includes channel layers, word lines, memory layers disposed between the channel layers and the word lines, and memory cells defined at cross-points of the channel layers and the word lines. The memory device is configured for performing a first operation for m times and a second operation for n times, and m is equal to or larger than n. In the first operation, a first electric field is produced in a portion of the memory layers. The word lines are configured for producing a second electric field in the second operation in the portion of the memory layers, and a field direction of the second electric field is different from a field direction of the first electric field.