3D Nonvolatile Memory Rectifier Biasing for Leakage Control
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Solution Overview
Problem
In nonvolatile memory devices with three-dimensionally stacked memory cells, the use of diodes as selectors leads to increased power consumption due to leakage currents and interference between selected and unselected memory cells during read operations, hindering normal detection of current and stability in read operations.
Innovation Solution
Implementing a rectifier, such as a diode, to selectively bias word lines and bit lines across memory layers, with specific voltage levels to forward-bias the selector of the selected memory cell while floating or biasing unselected memory cells to prevent leakage currents, thereby stabilizing the read operation and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If diodes are used as selectors for stacked memory cells, then the structure is simple and fabrication is easy, but power consumption increases due to leakage currents between selected and unselected memory cells
Solution Approach 1:
The patent applies different voltage levels to different parts of the memory array. Specifically, the word line WL is driven at a first voltage level for selected memory cells while bit lines are driven at a second voltage level for unselected memory cells. This local differentiation ensures that only selected cells are forward-biased and active, while unselected cells remain reverse-biased and inactive, thereby eliminating leakage currents and reducing power consumption.
Solution Approach 2:
The patent changes the voltage parameters dynamically during read operations. By alternating between first and second voltage levels for word lines and bit lines, the system controls the conduction state of diode selectors. When WL is at the first voltage level and bit line is at the second voltage level, the diode is forward-biased for reading. When WL is at the second voltage level, the diode is reverse-biased, blocking leakage current. This parameter switching resolves the power consumption issue while maintaining simple diode-based selection.
2Quantity of substance
If word lines and bit lines are shared between adjacent layers, then integration density increases, but leakage currents and interference between selected and unselected cells increase
Solution Approach 1:
The patent implements local quality by applying different voltage conditions to different memory layers sharing common word lines or bit lines. When a memory cell in one layer is selected, the shared word line or bit line is driven at a voltage level that forward-biases only the selector of the selected cell while reverse-biasing selectors in adjacent layers. This prevents leakage currents from unselected cells while maintaining the shared line structure for high integration density.
Solution Approach 2:
The voltage levels act as intermediaries that mediate the interaction between shared word lines and bit lines across layers. By using voltage as a control mechanism, the system enables selective conduction through the diode selectors. The first voltage level enables forward conduction for selected cells, while the second voltage level blocks conduction for unselected cells, effectively isolating the electrical paths despite physical sharing of conductive lines.
3Device complexity
If diodes are used as selectors, then the structure is simple, but detection precision of memory data is hindered due to current interference from unselected cells
Solution Approach 1:
The patent uses parameter changes in voltage levels to ensure precise current detection. During read operations, when the word line is driven at the first voltage level and the bit line at the second voltage level, the diode selector of the selected memory cell is forward-biased, allowing accurate current measurement. Meanwhile, unselected cells have their diodes reverse-biased due to the voltage configuration, blocking any leakage current from reaching the detection circuit. This voltage parameter control ensures that only current from the selected cell is detected, maintaining high measurement precision despite the simple diode structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for stable detection of the current from the selected memory cell while minimizing power consumption from unselected cells, enhancing the reliability and efficiency of read operations in nonvolatile memory devices.
Implementation Method 1
The memory cell array includes a rectifier, such as a diode, that is configured to select a memory cell in each memory layer sharing a word line or a bit line with another memory layer
Data Source
AI summary
Nonvolatile memory devices are provided including a memory cell array having a plurality of stacked memory layers and a rectifier configured to select memory cells constituting each memory layer sharing a word line or a bit line with another adjacent memory layer. The nonvolatile memory devices including a word line driving unit configured to drive a first word line, connected to a first memory cell of a first memory layer to be read, at a first voltage level and drive a second word line, connected to a second memory cell of a second memory layer sharing a first bit line connected to the first memory cell, at a second voltage level. The nonvolatile memory device further includes a bit line biasing unit configured to bias the first bit line at the second voltage level and bias a second bit line, connected to a third memory cell of a third memory layer sharing the first word line, at the first voltage level. Related methods and systems are also provided herein.