Semiconductor Memory Redundancy Management via Bitmap Fault Classification

The patent segments the fault analysis process into two distinct phases: fault collection phase and cross fault determination phase. During fault collection, faults are gathered without determining cross fault status. In the subsequent cross fault determination phase, the system efficiently identifies cross faults by checking whether repaired faults cover all child faults. This segmentation eliminates the need for exhaustive search during fault collection, significantly reducing analysis time while maintaining complete repair coverage.

The patent performs preliminary fault collection and organization before determining cross faults. By pre-collecting all faults and organizing them with their relationships (parent-child faults) established beforehand, the system prepares the data structure in advance. This preliminary action allows the cross fault determination to proceed efficiently by simply checking coverage relationships rather than performing exhaustive search, thus reducing analysis time without compromising repair completeness.

The patent segments the complex redundancy management process into distinct functional modules: fault collection module, fault organization module (with parent-child relationships), and cross fault determination module. Each module performs a specific function with simple logic, avoiding the need for a single complex exhaustive search algorithm. This modular segmentation reduces overall device complexity while ensuring complete repair coverage through coordinated module operation.

The patent introduces an intermediary data structure that records fault relationships (parent-child faults) and repair status. This intermediary structure serves as a mediator between fault collection and cross fault determination, allowing the system to track which child faults are covered by which parent fault repairs. This intermediary mechanism simplifies the cross fault determination logic compared to exhaustive search, reducing algorithm complexity while maintaining repair completeness.

The patent implements a dynamic redundancy allocation strategy where the system determines cross faults after fault collection based on actual fault distribution patterns. Rather than statically allocating redundancies for all possible cross fault scenarios, the system dynamically identifies which faults are actually cross faults and allocates redundancies accordingly. This dynamic approach ensures adequate repair capability for actual cross faults while avoiding allocation of redundancies for hypothetical scenarios, thus minimizing redundancy area.

The patent changes the parameter of redundancy allocation from a static predetermined value to a dynamic value determined by actual fault analysis. The system adjusts the number and positioning of redundancies based on the specific cross fault patterns detected during operation. This parameter change allows the system to maintain high repair capability for actual cross faults while optimizing redundancy area by allocating only the necessary number of redundancies rather than over-provisioning for all possible scenarios.