Semiconductor Memory Redundancy Circuit Area Optimization

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Solution Overview

Problem

The existing semiconductor memory apparatus redundancy control circuits face challenges in maximizing area margin due to the space requirements of fuse set units, which are necessary for redundancy operations but occupy valuable area, limiting the integration density.

Innovation Solution

The proposed solution involves relocating the fuse set unit to the peripheral circuit redundancy control block, allowing for a more compact memory bank region by using a peripheral circuit redundancy control block with a fuse set unit that determines redundancy states, thereby freeing up space in the memory bank for increased integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the fuse set unit is provided in the memory bank redundancy control block, then the redundancy control functionality is ensured, but the area margin of the memory bank region is reduced

Engineering Contradiction:

Improveredundancy control functionalityVSAvoidarea margin of memory bank region

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The redundancy control circuit is divided into two separate blocks: a peripheral circuit redundancy control block and a memory bank redundancy control block. The fuse set unit is relocated to the peripheral circuit block, while the memory bank block focuses on decoding and word line activation. This segmentation allows each block to have a specialized function and reduces the area occupied in the memory bank region.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The fuse set unit, which is necessary for redundancy operations but occupies valuable area in the memory bank, is extracted and relocated to the peripheral circuit redundancy control block. This extraction removes the area-consuming component from the memory bank region while preserving its essential functionality through the relocated unit.

Inventive Principle:

Principle #2Taking out (Extraction)

2Area of stationary object

If the fuse set unit is relocated to the peripheral circuit redundancy control block, then the area margin in the memory bank region is enhanced, but the circuit configuration becomes more complex

Engineering Contradiction:

Improvearea margin in memory bank regionVSAvoidcircuit configuration

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The fuse set unit is merged with the peripheral circuit redundancy control block, combining the redundancy determination functionality with the existing peripheral control structures. This merging creates a more integrated peripheral control unit while keeping the memory bank block simpler and focused on its core decoding functions.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS8339880B2Circuit for controlling redundancy in semiconductor memory apparatus

Publication Date: 2012.12.25 MIMIRIP LLC

AI summary

Disclosed are a circuit and a method for controlling redundancy in a semiconductor memory apparatus. The circuit includes a peripheral circuit redundancy control block and a memory bank redundancy control block. The peripheral circuit redundancy control block buffers and latches an external command to generate an internal command. The peripheral circuit redundancy control block also buffers and latches an external address to generate a global address by comparing the external address with a predetermined output signal of a fuse circuit. The memory bank redundancy control block receives the global address corresponding to the internal command to selectively activate a redundancy word line or a main word line, such that the fuse circuit is provided in the peripheral circuit redundancy control block.