Semiconductor Memory Redundancy Block Replacement Logic

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Solution Overview

Problem

Semiconductor memory devices face reduced production yield due to defective memory blocks, particularly those storing security data or device ID, which are treated as failed even if only a few blocks are defective, leading to inefficiencies in manufacturing.

Innovation Solution

Incorporating redundancy blocks that can replace defective main blocks or guarantee blocks, with control logic and address decoders enabling the selection of these redundancy blocks when defects are detected, allowing the device to function normally even with defective blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If redundancy blocks are implemented to replace defective main blocks, then production yield is improved, but device complexity increases

Engineering Contradiction:
Improveproduction yieldVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory device is divided into main blocks and guarantee blocks, with further segmentation of guarantee blocks into first and second groups. This segmentation allows selective replacement of defective blocks while preserving functional blocks, thereby improving production yield without requiring complete redundancy of the entire memory structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Redundancy blocks are pre-configured and prepared in advance to replace defective main blocks or guarantee blocks. The replacement signal is enabled beforehand through the repair logic, allowing quick substitution when defects are detected during manufacturing testing, thus improving production yield without adding complex runtime decision-making.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If guarantee blocks are made replaceable when defective, then production yield is improved, but reliability of security data storage may be compromised

Engineering Contradiction:
Improveproduction yieldVSAvoidreliability of security data storage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different replacement policies are applied to different groups of guarantee blocks based on their defect status. The repair logic selectively enables the replacement signal only for defective first or second group guarantee blocks, while leaving non-defective guarantee blocks intact. This ensures that security data stored in functional guarantee blocks remains protected, while allowing replacement of defective ones to improve production yield.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes the operational parameter (replacement signal state) based on the defect status of guarantee blocks. When a guarantee block is defective, the replacement signal is enabled to redirect access to redundancy blocks. When guarantee blocks are functional, the replacement signal remains disabled to maintain normal operation and ensure reliability of security data storage.

Inventive Principle:
Principle #35Parameter changes

3Ease of repair

If repair logic and control logic are added to manage block replacement, then ease of repair is improved, but device complexity increases

Engineering Contradiction:
Improveease of repairVSAvoiddevice complexity
Core Design Contradiction:
Ease of repairVSDevice complexity

Solution Approach 1:

The repair logic automatically detects defective guarantee blocks and generates replacement signals without external intervention. The control logic self-manages the address generation and block selection based on the replacement signal state, enabling the device to self-correct manufacturing defects and improving ease of repair without requiring complex external repair systems.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9741454B2Semiconductor memory device and method of operating the same
Publication Date: 2017.08.22 SK HYNIX INC
  • US9741454B2 patent drawing
  • US9741454B2 patent drawing
  • US9741454B2 patent drawing

AI summary

A semiconductor memory device includes a memory cell array having a first group of main blocks, a second group of main blocks and redundancy blocks replacing the first group of main blocks or the second group of main blocks, a repair logic suitable for enabling a replacement signal when one or more of the second group of main blocks are defective, a control logic suitable for generating an address for the second group of main blocks in response to a dedicated command for access to one or more of the second group of main blocks, and an address decoder suitable for selecting one or more of the redundancy blocks based on the address for the second group of main blocks when the replacement signal is enabled.