Memory Redundancy via Segmented Replacement Units
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Solution Overview
Problem
Existing memory array redundancy systems face inefficiencies in space utilization and defect repair due to the large number of fuses or antifuses required for smaller replacement units, and limitations in fully repairing defects when redundant memory is not evenly distributed across sections.
Innovation Solution
The implementation of replacement units comprising adjacent columns from multiple IO and CS lines, allowing for flexible and efficient remapping of defective memory cells by using fewer fuse groups and optimizing the arrangement of redundant memory sections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If smaller replacement units are used to improve efficient use of redundant memory, then redundant memory efficiency is improved, but the number of fuses or antifuses required increases significantly
Solution Approach 1:
The patent segments the memory array into multiple sections, with each section having its own dedicated replacement units. This segmentation allows each section to be repaired independently using local replacement units, reducing the need for numerous fuses across the entire array while maintaining efficient redundant memory usage.
Solution Approach 2:
The patent implements local replacement units specifically positioned within each memory section to repair defects in that section. This local quality approach ensures that replacement resources are concentrated where needed, improving redundant memory efficiency without requiring a proportional increase in fuse count across the entire device.
2Ease of operation
If redundant memory is arranged to replace defective memory of only a respective section, then local repair capability is improved, but the ability to fully repair defects across the entire array is reduced
Solution Approach 1:
The patent designs replacement units with multi-functionality, allowing them to serve both as local repair resources for their specific memory section and as part of a broader repair strategy for the entire array. This universal design enables replacement units to address defects at multiple levels, maintaining both local repair capability and complete array repairability.
Solution Approach 2:
The patent combines multiple replacement units across different memory sections into a coordinated repair system. By merging the repair capabilities of individual section-based replacement units, the system achieves comprehensive defect repair across the entire memory array while preserving the advantages of localized repair architecture.
3Adaptability or versatility
If more replacement units are used to repair more defects, then defect repair coverage is improved, but the space required for fuses and decoding circuitry increases
Solution Approach 1:
The patent divides the memory array into sections, each with dedicated replacement units and associated fuse groups. This segmentation allows defect repair coverage to be improved within each section without requiring proportional increases in fuse and decoding circuitry space across the entire array, as each section operates semi-independently with its own repair resources.
Solution Approach 2:
The patent implements replacement units that can handle both small and large defects within each memory section, providing partial repair capability for minor defects and excessive action for larger defect clusters. This approach maximizes defect repair coverage within the constrained space of each section's dedicated fuses and decoding circuitry, avoiding the need for additional resources.
Data Source
AI summary
A memory array having a main memory array and a redundant memory array. The redundant memory array includes redundant memory arranged in replacement units to which memory of the main memory are mapped. Each replacement unit includes columns of redundant memory arranged in input-output (IO) groups and further includes columns of redundant memory from a plurality of IO groups. The IO groups have columns of memory associated with a plurality of different IOs and the plurality of IO groups of the replacement unit adjacent one another.