Memory Redundancy Analysis Using Tag Image Failure Counts
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Solution Overview
Problem
Conventional memory testing methods are inefficient in analyzing redundancy and identifying failures in memory devices with stuck rows or columns, leading to ineffective tag images and increased test time and hardware requirements.
Innovation Solution
The proposed solution involves generating tag images with failure counts for each memory cell group dimension, where failure counts indicate the number of detected failures and become 'expired' when the number of available redundant groups for repair is exceeded, necessitating repair by redundant groups within the same dimension, thereby optimizing redundancy analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory testing methods are used to analyze redundancy and identify failures, then the testing process can be completed, but the test time increases and hardware requirements increase
Solution Approach 1:
The patent applies preliminary action by pre-initializing failure counts in tag images with the maximum number of allowed failures for each memory cell group. This preparation is done before actual testing begins, allowing the testing process to quickly decrement and check against the pre-set limits without performing complex real-time calculations, thereby reducing test time while maintaining accurate redundancy analysis.
Solution Approach 2:
The patent extracts and stores failure count information directly in the tag images associated with each memory cell group, rather than maintaining separate complex data structures. This extraction of failure tracking functionality into the tag images themselves simplifies the hardware requirements and reduces the need for additional hardware resources while preserving reliability.
2Reliability
If conventional memory testing methods are used to analyze redundancy and identify failures, then the testing process can be completed, but hardware requirements increase
Solution Approach 1:
The patent makes the tag images multi-functional by having them serve both as error indicators and as storage for failure count information. Each tag image entry stores both the failure status and the failure count, eliminating the need for separate hardware structures to track failures. This universal use of tag images reduces hardware requirements while maintaining accurate redundancy analysis capability.
Solution Approach 2:
The patent extracts the failure tracking functionality from complex separate data structures and integrates it directly into the existing tag images. This extraction and integration simplifies the overall hardware architecture by eliminating redundant storage mechanisms and reducing the complexity of failure analysis hardware while preserving the ability to accurately identify must-repair memory cell groups.
3Measurement precision
If failure counts are tracked for each memory cell group dimension, then must-repair rows and columns can be accurately identified, but the complexity of failure analysis increases
Solution Approach 1:
The patent segments the failure analysis by maintaining separate failure counts for different dimensions (rows and columns) in their respective tag images. Each memory cell group has its own failure count in the appropriate dimension, allowing independent tracking and analysis. This segmentation enables precise identification of must-repair groups while keeping the analysis method simple and systematic rather than requiring complex unified analysis.
Data Source
AI summary
A method and apparatus for filtering failures due to must-repair rows or columns from a memory test fail summary image includes current available redundant row failure counts respectively associated with rows of a memory device and current available redundant column failure counts associated with columns of the device. Respective failure counts are preloaded with the respective values of redundant rows and columns available for repairing the device. When failures in memory cells of the device are encountered, either during test, or during scan of an earlier generated error image, the row and column failure counts associated with the rows and columns containing the memory cell failures are decremented. At the end of a test, the value of the failure counts indicates whether the corresponding row or column contain any failures at all, whether the corresponding row or column is designated as a “must-repair” row or column, and otherwise how many errors the corresponding row or column contain.


