Memory Redundant Arrays for Local I/O Repair
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Solution Overview
Problem
Conventional solid state memory devices require a substantial amount of space for global redundant arrays to replace defective sub-arrays, which can be inefficient in terms of die space and power consumption.
Innovation Solution
The memory device is configured with a memory array that includes sub-arrays divided into segments, shared global I/O lines, and multiplexers to selectively route data between local and global I/O lines, allowing only the affected segment to be replaced when a local I/O line defect is detected, thereby reducing the size of the global redundant array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a global redundant array is used to replace defective sub-arrays, then repair capability is improved, but die space is increased
Solution Approach 1:
The memory array is divided into multiple sub-arrays, each with its own local redundant array. This segmentation allows defects to be repaired at the sub-array level rather than requiring a global redundant array, significantly reducing the space required for redundancy while maintaining repair capability.
Solution Approach 2:
The patent introduces a hierarchical redundancy structure with both local and global redundant arrays operating at different levels. The local redundant arrays handle sub-array level repairs, while the global redundant array handles cross-sub-array repairs, creating a multi-dimensional repair capability that optimizes space utilization.
2Adaptability or versatility
If local I/O lines are extended to access more memory cells, then connectivity is improved, but power consumption is increased
Solution Approach 1:
Local I/O lines are confined to individual sub-arrays rather than spanning the entire memory array. This segmentation limits the length of local I/O lines, reducing their capacitance and power consumption while maintaining adequate connectivity within each sub-array through the addition of local redundant arrays.
3Area of stationary object
If the global redundant array size is reduced, then die space is saved, but repair capability is degraded
Solution Approach 1:
By dividing the memory array into sub-arrays with dedicated local redundant arrays, the burden on the global redundant array is reduced. The global redundant array only needs to handle defects that cannot be repaired at the local level, allowing it to be smaller while maintaining adequate repair capability.
Solution Approach 2:
The hierarchical redundancy structure creates a multi-level repair system where local redundant arrays handle the majority of repair cases at the sub-array level, and the global redundant array provides backup for more complex defects. This dimensional hierarchy optimizes the balance between global redundant array size and overall repair capability.
Data Source
AI summary
Apparatus and methods are disclosed, such as those involving a memory device. One such memory device includes a memory array including a sub-array that includes a first number of columns of memory cells, and one or more global input/output (I/O) lines shared by the first number of columns for data transmission. The memory device also includes one or more multiplexers/demultiplexers, wherein each of the multiplexers/demultiplexers is electrically coupled to one or more, but not all, of the global I/O lines. The memory device further includes a plurality of local I/O lines, each configured to provide a data path between one of the multiplexers/demultiplexers and one or more, but less than the first number, of the columns in the sub-array. This configuration allows local I/O line repairability with fewer redundant elements, and shorter physical local I/O lines, which translate to improved speed and die size reduction.