Non-volatile Memory Reference Cell Segmentation for Comparator Offset Compensation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Non-volatile memory devices face challenges due to process variations causing different offsets in comparator transistors, resulting in a larger operating window and reduced precision in reading memory cells.

Innovation Solution

The implementation of a non-volatile memory device with an array of memory cells and multiple reference cells, each programmable to a unique level, connected to comparators to compensate for offset variations, allowing for a tighter operating window by adjusting reference levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If all comparators are connected to a single reference cell or reference cells set to the same targeted signal value, then the device structure is simple, but the operating window becomes larger due to comparator offset variations

Engineering Contradiction:
Improvereference cell configurationVSAvoidreading precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent divides the single reference cell into multiple reference cells (first reference cell and second reference cell), each connected to different comparators. This segmentation allows each comparator to have its own reference level, compensating for individual offset variations and reducing the operating window without increasing overall device complexity significantly.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each reference cell is programmed to a different reference level tailored to the specific comparator it serves. This local customization allows each comparator to operate with optimized reference conditions, compensating for local offset variations and improving reading precision for each cell group independently.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If multiple reference cells with different programmed levels are used, then comparator offsets are compensated and operating window is reduced, but the device complexity increases

Engineering Contradiction:
Improvereading precisionVSAvoidreference cell configuration
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The reference cell array is segmented into multiple independently programmable reference cells, each serving a specific comparator. This segmentation enables precise offset compensation for each comparator while maintaining a structured, manageable architecture that does not excessively increase device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The reference levels of the reference cells are programmably adjusted to different values during manufacturing or initialization. This parameter customization allows the system to compensate for comparator offsets by programming each reference cell to a level that compensates for its associated comparator's specific offset characteristics.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8780639B2Non-volatile memory device with plural reference cells, and method of setting the reference cells
Publication Date: 2014.07.15 SILICON STORAGE TECHNOLOGY INC
  • US8780639B2 patent drawing
  • US8780639B2 patent drawing
  • US8780639B2 patent drawing

AI summary

A non-volatile memory device has an array of non-volatile memory cells, a first plurality of non-volatile memory reference cells, with each reference cell capable of being programmed to a reference level different from the other reference cells; and a second plurality of comparators. Each of the comparators is connectable to one of the first plurality of non-volatile memory reference cells and to one of a third plurality of memory cells from among the array of non-volatile memory cells.