Memory Device Reference Voltage Generation Circuit

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Solution Overview

Problem

Memory devices face challenges in reliably generating internal voltages during both standby and active modes, leading to potential errors and operational disruptions due to variations in power supply voltages, which affect the stability and performance of semiconductor memory systems.

Innovation Solution

A memory device incorporating a reference voltage generation circuit that switches between standby and active mode reference voltages based on error detection, ensuring the generation of internal voltages necessary for program, read, and test operations, thereby maintaining reliable operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If standby mode reference voltage is used to generate internal voltage, then power consumption is reduced, but error rate increases

Engineering Contradiction:
Improvepower consumptionVSAvoiderror rate
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The system dynamically switches between standby mode reference voltage and active mode reference voltage based on operational state. During standby, standby reference voltage is used to minimize power consumption. When errors are detected or active operations are required, the system transitions to active reference voltage to ensure reliability, thus making the reference voltage selection adaptive rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements error detection feedback mechanism that monitors the internal voltage generated from standby reference voltage. When errors are detected, the feedback signal triggers a switch to active mode reference voltage, creating a closed-loop control system that automatically corrects reliability issues while maintaining power efficiency during normal standby operation.

Inventive Principle:
Principle #23Feedback

2Reliability

If active mode reference voltage is used to generate internal voltage, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improveerror rateVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system employs dynamic reference voltage selection that adapts to operational requirements. Active mode reference voltage is selectively applied only when reliability is critical (during active operations or error conditions), while standby mode reference voltage is used during low-power periods, optimizing the trade-off between reliability and power consumption based on real-time system state.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Different reference voltage qualities are applied to different operational contexts. The standby reference voltage provides sufficient quality for low-power monitoring and idle operations, while the active reference voltage provides higher quality for computationally intensive operations. This localized quality approach ensures each operational mode receives appropriate voltage quality without unnecessary power overhead.

Inventive Principle:
Principle #3Local quality

3Reliability

If error detection and voltage switching mechanism is added, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reference voltage generation circuit is designed to perform multiple functions: generating standby reference voltage, generating active reference voltage, and providing error detection. By making the circuit multi-functional rather than requiring separate dedicated circuits for each function, the patent reduces overall device complexity while maintaining improved reliability through error detection and switching capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11610636B2Memory device and method of generating an internal voltage when an error occurred during standby mode
Publication Date: 2023.03.21 SK HYNIX INC
  • US11610636B2 patent drawing
  • US11610636B2 patent drawing
  • US11610636B2 patent drawing

AI summary

Provided herein is a memory device and a method of operating the memory device. The memory device includes: a reference voltage generation circuit configured to generate a standby mode reference voltage in a standby mode, and generate and output an active mode reference voltage in an active mode; and an internal voltage generation circuit configured to receive the standby mode reference voltage or the active mode reference voltage from the reference voltage generation circuit, and generate an internal voltage. When an error is detected from the internal voltage generated in the standby mode, the reference voltage generation circuit may generate and output the active mode reference voltage.