Non-volatile Memory Periodic Refresh Charge Loss
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Solution Overview
Problem
Non-volatile memory devices face challenges in data retention due to thin gate oxide layers, leading to charge loss and corruption of stored data, especially when the oxide thickness is below 85 Angstroms, which is not compatible with standard CMOS technology.
Innovation Solution
A non-volatile memory device with a network of floating-gate transistors that periodically detects charge loss and reprograms cells to restore charge levels, incorporating an error correction block for redundant data storage and correction, allowing for enhanced data retention even with thinner gate oxide layers up to 50 Angstroms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate oxide layer thickness is reduced to enable standard CMOS technology compatibility, then manufacturing precision and ease of manufacture are improved, but data retention reliability deteriorates due to charge loss through tunneling
Solution Approach 1:
The patent implements periodic refresh operations that proactively detect and correct charge loss before it causes data corruption. The system periodically reads memory cells, detects charge loss through threshold comparisons, and reprograms affected cells to restore proper charge levels, preventing data integrity failures even with thin oxide layers
Solution Approach 2:
The patent employs a feedback mechanism where the memory controller continuously monitors memory cell status by comparing read currents against thresholds. When charge loss is detected (current falls between first and second thresholds), the system automatically triggers reprogramming operations to restore charge levels, creating a closed-loop control system that maintains data integrity despite physical degradation
2Length of moving object
If the gate oxide layer thickness is reduced below 85 Angstroms, then device miniaturization and integration density are improved, but charge loss through tunneling increases leading to data corruption
Solution Approach 1:
The system performs periodic preventive refresh operations that detect and correct charge loss before it reaches levels that cause data corruption. By monitoring memory cells regularly and reprogramming those showing charge loss signs (detected through current threshold comparisons), the system prevents information loss rather than reacting after corruption occurs
Solution Approach 2:
A feedback control system continuously monitors memory cell charge levels by measuring read currents and comparing them against defined thresholds. When charge loss is detected (current between first and second thresholds indicating partial charge loss), the system automatically triggers reprogramming to restore charge, creating a self-correcting mechanism that counteracts tunneling effects
3Reliability
If periodic refresh operations are implemented to detect and correct charge loss, then data retention reliability is improved, but device complexity and operational overhead increase
Solution Approach 1:
The memory controller performs multiple functions using the same hardware resources: it manages normal memory operations, executes periodic refresh operations, detects charge loss through threshold comparisons, and triggers reprogramming when needed. This multi-functionality avoids adding dedicated complex refresh hardware while maintaining reliability
Solution Approach 2:
The system uses its own existing memory read capabilities and control logic to perform charge loss detection and trigger reprogramming operations. The memory controller monitors its own memory cells and initiates corrective actions using standard memory interfaces and control mechanisms, rather than requiring external monitoring or specialized repair hardware
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively maintains data retention for several years by periodically reprogramming cells and correcting errors, ensuring the integrity of stored information even with thinner gate oxide layers, thereby overcoming the limitations of conventional technologies.
Implementation Method 1
the control gate is coupled capacitively to the floating gate
Implementation Method 2
it is insulated such that the charges transferred to it remain stored
Implementation Method 3
a strong electrical field is created which attracts the electrons from the active area to the floating gate through the gate oxide
Implementation Method 4
the electrons stored in the floating gate are likely to pass through the polysilicon/oxide/silicon barriers to migrate towards the substrate. Such a phenomenon is generally called 'tunneling'
Implementation Method 5
to perform a Fowler-Nordheim type programming, that is, to apply a strong electrical field to the control gate to lower the energy barriers and allow electrons to pass to the floating gate
Data Source
AI summary
A non-volatile memory device includes a network of non-volatile memory cells, each comprising a floating-gate transistor, said network of cells being intended to store data in the form of a set of data words. The device includes a circuit which detects loss of charges stored in the cells and then reprograms the cells for which a loss of charges has been detected so as to restore the level of stored charges.