Semiconductor Memory Refresh Using Aggressor Row Flag Bits
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Solution Overview
Problem
In semiconductor memory devices like DRAM, the issue of row hammering occurs when certain word lines are repeatedly activated, causing adjacent memory cells to experience data loss due to electromagnetic interference, leading to inefficient refresh operations and high power consumption as the affected rows are randomly refreshed.
Innovation Solution
A semiconductor memory system is introduced with a mark storage area containing first flag bits to identify aggressor rows of row hammer events, allowing for targeted refresh operations and reducing power consumption by accurately locating and refreshing only necessary memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If random refresh operation is performed on storage rows after row hammer detection, then refresh coverage is improved, but power consumption increases and handling effectiveness decreases
Solution Approach 1:
The patent segments the refresh operation by dividing storage rows into two categories: aggressor rows (identified by flag bits) and non-aggressor rows. This segmentation allows targeted refresh operations on specific rows that need protection, rather than performing random or blanket refresh operations on all rows, thereby reducing unnecessary power consumption while maintaining effective row hammer mitigation.
Solution Approach 2:
The patent implements preliminary action by setting flag bits to mark aggressor rows before the actual refresh operation occurs. This pre-marking process enables the system to identify which rows require refresh operations in advance, allowing subsequent refresh operations to be precisely targeted at vulnerable rows adjacent to aggressor rows, thus avoiding wasted energy on rows that don't need refreshing.
2Reliability
If random refresh operation is performed on storage rows after row hammer detection, then refresh coverage is improved, but handling effectiveness decreases
Solution Approach 1:
The patent segments the refresh operation by dividing storage rows into two categories: aggressor rows (identified by flag bits) and non-aggressor rows. This segmentation allows targeted refresh operations on specific rows that need protection, rather than performing random or blanket refresh operations on all rows, thereby reducing unnecessary power consumption while maintaining effective row hammer mitigation.
Solution Approach 2:
The patent implements preliminary action by setting flag bits to mark aggressor rows before the actual refresh operation occurs. This pre-marking process enables the system to identify which rows require refresh operations in advance, allowing subsequent refresh operations to be precisely targeted at vulnerable rows adjacent to aggressor rows, thus avoiding wasted energy on rows that don't need refreshing.
Data Source
AI summary
A semiconductor memory, a refresh method and an electronic device are provided. The semiconductor memory includes a main storage area and a mark storage area, multiple storage rows are arranged in the main storage area, and multiple first flag bits are arranged in the mark storage area. Each storage row has a correspondence with one first flag bit, and the first flag bit is used for indicating whether the storage row is an aggressor row of a row hammer event.