Memory Refresh Scheduling for Evenly Distributed IO Latency

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Solution Overview

Problem

The increasing capacity of memory storage devices leads to increased input output (IO) latency due to refresh operations, which negatively impacts user experience.

Innovation Solution

A memory management method that evenly distributes IO latency by executing refresh operations in stages based on the current state and category of physical blocks to be refreshed, using a physical block management table to prioritize and sequence write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operations are performed on multiple physical blocks after abnormal power loss, then data reliability is improved, but input output latency time increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidinput output latency time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The refresh operations are segmented and integrated into the normal write operation pipeline. Instead of performing all refresh operations separately before user writes, the system divides refresh tasks into multiple stages that interleave with cache write operations, distributing the refresh burden across multiple I/O cycles rather than concentrating it in one location.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges refresh operations with normal user write operations. The controller combines the refresh task (writing refreshed data from physical blocks to cache) with the user's write task (writing user data to cache), so both operations share the same I/O pipeline and resources, reducing total latency.

Inventive Principle:
Principle #5Merging (Combining)

2Loss of time

If refresh operations are performed before cache is fully written, then IO latency is reduced, but operation complexity increases

Engineering Contradiction:
ImproveIO latencyVSAvoidoperation complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The system dynamically adjusts the execution order and prioritization of refresh operations based on cache status and operation urgency. The controller determines whether to perform refresh operations before, during, or after user writes based on real-time conditions, and assigns different priorities to different physical blocks needing refresh, making the operation schedule flexible rather than fixed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller uses feedback from the cache write status and refresh operation progress to dynamically adjust the scheduling of subsequent operations. The physical block management table tracks which blocks need refreshing and their priority levels, allowing the controller to make informed decisions about operation sequencing based on current system state.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12504889B2Memory management method for evenly distributing input output latency time, memory storage device, and memory control circuit unit
Publication Date: 2025.12.23 HEFEI CORE STORAGE ELECTRONICS LTD
  • US12504889B2 patent drawing
  • US12504889B2 patent drawing
  • US12504889B2 patent drawing

AI summary

A memory management method, a memory storage device, and a memory control circuit unit are provided. The memory management method includes: creating a physical block management table for managing physical blocks; selecting at least one physical block to be refreshed based on the physical block management table when power is restored after an abnormal power loss; in response to a number of the at least one physical block to be refreshed being greater than 1, determining at least one current state and at least one category of the at least one physical block to be refreshed; and executing at least one second write operation based on the current state and the category together when executing a first write operation. The first write operation includes writing user data into a cache. The second write operation includes writing data stored in a physical block to be refreshed into a first physical block.