Nonvolatile Memory Refresh Control via Erasing Loop Count
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Solution Overview
Problem
In NOR-type flash memory, the 'bulk erase disturb' phenomenon reduces the threshold voltage of unerased but programmed memory cells due to excessive unnecessary erasing operations, necessitating a time-consuming refreshing operation to maintain data storage performance.
Innovation Solution
A control method for non-volatile memory that adjusts the capacity of to-be-refreshed memory blocks based on the number of erasing loops performed, allowing for flexible refreshing operations to reduce time spent on erasing and refreshing, by performing the erasing operation, verification, and erasing loop in the target region and refreshing a pre-defined portion in the unselected region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a refreshing operation is performed on all non-designated memory cells to maintain data storage performance, then data access performance is improved, but the time consumed for refreshing operation increases significantly
Solution Approach 1:
The patent applies local quality by differentiating the refreshing strategy based on the specific characteristics of memory blocks. Instead of uniformly refreshing all non-designated memory cells, the system identifies and refreshes only specific memory blocks (e.g., first and second memory blocks) that are most susceptible to bulk erase disturb, thereby reducing overall refreshing time while maintaining data access performance for critical areas.
Solution Approach 2:
The patent implements partial action by performing refreshing operations on only a subset of memory blocks rather than all non-designated memory cells. The controller selectively refreshes memory blocks based on their vulnerability to erase operations, accepting that not all memory cells require refreshing to maintain acceptable performance levels.
2Loss of time
If the capacity of to-be-refreshed memory blocks is reduced to save refreshing time, then refreshing operation time is decreased, but data access performance may deteriorate
Solution Approach 1:
The patent applies local quality by differentiating the refreshing strategy based on the specific characteristics of memory blocks. Instead of uniformly refreshing all non-designated memory cells, the system identifies and refreshes only specific memory blocks (e.g., first and second memory blocks) that are most susceptible to bulk erase disturb, thereby reducing overall refreshing time while maintaining data access performance for critical areas.
Solution Approach 2:
The patent employs feedback mechanisms where the controller monitors verification operation results and adjusts the refreshing strategy accordingly. Based on the number of erasing loops completed and verification outcomes, the controller determines which memory blocks require refreshing and to what extent, dynamically balancing time savings with performance maintenance.
Data Source
AI summary
A memory device and a control method for a non-volatile memory are provided. The non-volatile memory includes a target erasing region and an unselected region. The control method includes: erasing a target memory cell in the target erasing region. The unselected region is a region, excluding the target erasing region, in the non-volatile memory. The step of erasing the target memory cell includes an erasing operation, a verification operation, and an erasing loop after failing to pass the verification operation. The number of times of performing the erasing loop is an integer greater than or equal to 0. The control method further includes: refreshing a pre-defined portion in the unselected region, wherein a capacity of the pre-defined portion is determined by the number of times of performing the erasing loop.