Memory Refresh Oscillator Control for Chip-Specific Period Setting
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Solution Overview
Problem
The existing memory devices face challenges in setting the oscillation period of the refresh request signal to account for variations between semiconductor chips, particularly during probing tests before and after replacing normal memory cells with redundant ones, due to process variations and the inability to obtain the frequency division number externally.
Innovation Solution
An oscillation device with a first setting unit, a calculating unit, and an oscillating unit that generates an oscillation signal with a designated period, allowing for measurement and adjustment of the frequency division number to be written into a fuse circuit, enabling accurate setting of the refresh request signal period with a margin, and adapting to temperature variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the frequency division number is changed in each semiconductor chip to adjust the refresh request signal period, then the variation in oscillation period between chips is reduced, but the ability to set appropriate margins for probing tests before and after redundancy is compromised
Solution Approach 1:
The patent implements a dynamic frequency division number setting mechanism that can be changed between different operational modes. The control circuit selects between a first frequency division number for probing tests before redundancy and a second frequency division number for probing tests after redundancy, allowing the system to adapt its oscillation period characteristics to different testing requirements while maintaining manufacturing precision in each mode.
Solution Approach 2:
The patent changes the frequency division number parameter based on the operational mode. By switching between different frequency division numbers (first frequency division number before redundancy, second frequency division number after redundancy), the system adjusts the oscillation period to provide appropriate margins for different probing test conditions, resolving the contradiction between precision and adaptability.
2Reliability
If the period of the refresh request signal before redundancy is set to be longer than after redundancy, then failures caused by insufficient refresh operation are prevented, but the frequency division number cannot be obtained externally for proper setting
Solution Approach 1:
The patent implements a self-service mechanism where the control circuit automatically determines and sets the appropriate frequency division number based on the operational mode. The system internally manages the frequency division number selection without requiring external input, automatically using the first frequency division number before redundancy and the second frequency division number after redundancy, thereby ensuring both reliability and ease of operation.
Solution Approach 2:
The control circuit uses feedback from the operational mode (before or after redundancy) to automatically select the appropriate frequency division number. This feedback mechanism ensures that the system always uses the correct frequency division number for the current testing phase, maintaining reliability while eliminating the need for external setting.
3Device complexity
If a single frequency division number is used for all chips, then the device complexity is reduced, but the variation in required refresh time between chips increases
Solution Approach 1:
The patent implements a dynamic frequency division number selection mechanism controlled by the control circuit. The system transitions from a static single frequency division number approach to a dynamic multi-mode approach, where the frequency division number changes based on the operational mode (before or after redundancy), maintaining manufacturing precision while managing complexity through systematic control.
Data Source
AI summary
An oscillation device includes a first setting unit that outputs an oscillation period designation signal, a calculating unit that performs an arithmetic operation on the oscillation period designation signal, and an oscillating unit that generates an oscillation signal having a period based on the oscillation period designation signal subjected to the arithmetic operation.