Semiconductor Memory Refresh Method Using Redundancy Check Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor memory devices require frequent refresh operations to maintain data integrity, but the existing refresh redundancy check process consumes valuable time, reducing the efficiency of the actual refresh operation as devices shrink in size and memory cells increase.
Innovation Solution
A semiconductor memory device with a refresh method that replaces pairs of normal word lines with redundancy word lines, using a refresh address counter to sequentially count addresses and perform a refresh redundancy check during the first pulse of the refresh signal, while omitting the check during the second pulse to optimize refresh time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a refresh redundancy check is performed during every refresh operation, then data integrity is ensured, but refresh time increases and refresh efficiency decreases
Solution Approach 1:
The patent performs a refresh redundancy check in advance during the first refresh operation to identify and replace defective word lines with redundancy word lines. This preliminary action ensures that subsequent refresh operations do not need to perform redundant checks, thereby reducing refresh time while maintaining data integrity.
Solution Approach 2:
The patent segments the refresh operations into two distinct phases: the first refresh operation includes a redundancy check to identify defective lines, while subsequent refresh operations omit the check since redundancy has already been established. This segmentation allows the system to balance between reliability and time efficiency.
2Reliability
If refresh operations are performed frequently to maintain data integrity, then memory reliability improves, but the time available for actual refresh operations decreases
Solution Approach 1:
The patent performs the time-consuming redundancy check as a preliminary action during the first refresh operation. This establishes a lookup table that stores the correspondence between normal word lines and redundancy word lines, eliminating the need for repeated checks in subsequent refresh operations and thereby improving overall refresh efficiency.
Solution Approach 2:
The patent creates a copy of the redundancy information in the form of a lookup table during the first refresh operation. This copied information is then reused in subsequent refresh operations, avoiding the need to perform the same redundancy check repeatedly and thus improving productivity.
3Volume of moving object
If the memory device size is reduced and memory cell count increases, then device integration improves, but refresh operation time becomes more critical and harder to manage
Solution Approach 1:
The patent performs the redundancy check and establishes the lookup table in advance during the first refresh operation. This preliminary action is particularly important for miniaturized devices with high memory cell density, as it eliminates the need for repeated checks in subsequent operations, thereby managing refresh time effectively despite increased device integration.
Data Source
AI summary
A semiconductor memory device may include a row address generating circuit, a row active pulse generating circuit and a word line activating circuit. The row address generating circuit may generate a row address in response to a refresh command, a row active pulse, and a normal address. The row active pulse generating circuit may generate a row active pulse in response to a refresh signal and an active signal. The word line activating circuit may selectively enable a word line in response to the row address and the row active pulse.