Memory Refresh Command Combining Mode Register Read
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Solution Overview
Problem
The frequent polling of operating parameters in memory devices, such as device temperature, to adjust refresh rates consumes significant bandwidth on the command/address bus, leading to congestion and inefficiency.
Innovation Solution
A single command, such as a refresh command, triggers both a refresh operation and a mode register read, allowing the memory device to output mode register data without requiring a separate command, thereby reducing the consumption of command/address bus bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frequent polling of operating parameters is performed to adjust refresh rates, then memory device reliability is improved, but command/address bus bandwidth consumption increases
Solution Approach 1:
The patent combines a mode register read operation with a refresh operation by issuing a single command that triggers both operations simultaneously. This merging eliminates the need for separate commands for parameter polling and refresh operations, thereby reducing command/address bus bandwidth consumption while maintaining the ability to monitor operating parameters for reliability purposes
Solution Approach 2:
The patent implements a multi-functional command that serves dual purposes: it performs the refresh operation required for memory reliability and simultaneously reads the mode register to poll operating parameters. This universal command structure allows the system to achieve multiple objectives with a single bus transaction, addressing both reliability monitoring and bandwidth efficiency
2Measurement precision
If separate commands are used for refresh operations and mode register reads, then operation precision is maintained, but device complexity increases
Solution Approach 1:
The patent merges two separate command sequences (refresh command and mode register read command) into a single combined command. This reduces the complexity of the command sequence and the number of bus transactions required, while the internal architecture ensures that both operations are performed with the same precision as if executed separately
3Reliability
If multiple separate commands are issued for combined operations, then operational reliability is improved, but loss of time increases
Solution Approach 1:
The patent combines multiple operations into a single command transaction, eliminating the time required for issuing and processing separate commands between the refresh operation and mode register read. This reduces command overhead time and increases operational efficiency while maintaining reliability through the coordinated execution of both operations within the single command framework
Data Source
AI summary
Memory devices, memory systems, and methods of operating memory devices and systems are disclosed in which a single command can trigger a memory device to perform multiple operations, such as a single refresh command that triggers the memory device to both perform a refresh command and to perform a mode register read. One such memory device comprises a memory, a mode register, and circuitry configured, in response to receiving a command to perform a refresh operation at the memory, to perform the refresh operation at the memory, and to perform a read of the mode register. The memory can be a first memory portion, the memory device can comprise a second memory portion, and the circuitry can be further configured, in response to the command, to provide on-die termination at the second memory portion of the memory system during at least a portion of the read of the mode register.