Memory Refresh Control via Switch Circuit Mapping
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Solution Overview
Problem
Existing computing systems face challenges in optimizing memory access and communication efficiency between hosts and memory devices, leading to suboptimal performance due to unnecessary refresh operations across all memory areas.
Innovation Solution
A computing system that selectively performs refresh operations on specific memory areas allocated to hosts, using a switch circuit to store mapping information and determine which memory areas require refresh based on allocation information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh operations are performed on all memory areas, then data integrity is maintained, but power consumption increases
Solution Approach 1:
The memory system is segmented into multiple memory areas, each associated with specific hosts. The refresh operation is segmented to apply only to allocated memory areas rather than the entire memory space. The switch circuit segments the refresh operation by using mapping information to identify which memory areas require refresh based on host allocation status.
Solution Approach 2:
Different refresh operations are applied to different memory areas based on their allocation status. Memory areas allocated to hosts receive normal refresh operations to maintain data integrity, while unallocated memory areas skip refresh operations to reduce power consumption. This local differentiation resolves the contradiction by applying quality control selectively rather than uniformly across all memory areas.
2Reliability
If refresh operations are performed on all memory areas, then data integrity is maintained, but system performance deteriorates
Solution Approach 1:
The refresh operation is segmented into two distinct paths: normal refresh for allocated memory areas and skip refresh for unallocated areas. This segmentation allows the system to maintain data integrity where needed while improving overall performance by eliminating unnecessary refresh cycles in unallocated regions.
Solution Approach 2:
Instead of performing complete refresh operations on all memory areas (excessive action), the system performs partial refresh operations only on the necessary allocated memory areas. This partial action approach maintains sufficient data integrity for active memory while avoiding the performance penalty of redundant refresh operations on inactive memory regions.
3Productivity
If mapping information is stored and processed, then selective refresh is enabled, but device complexity increases
Solution Approach 1:
The switch circuit is designed with multi-functionality, serving both as a routing component for host-memory communication and as a refresh control component. By integrating the mapping information storage and refresh decision-making functions into the existing switch circuit, the patent avoids adding separate dedicated hardware for selective refresh control, thereby limiting the increase in device complexity.
Solution Approach 2:
The switch circuit performs self-service by utilizing its own mapping information to control the refresh operation. Rather than requiring an external controller to analyze mapping information and generate refresh control signals, the switch circuit autonomously uses its stored mapping data to determine which memory areas require refresh, simplifying the overall system architecture.
Data Source
AI summary
A system includes: a plurality of memory devices, each of the plurality of memory devices including a plurality of memory areas; a host configured to communicate with the plurality of memory devices; and a switch circuit configured to store mapping information for a memory area allocated to the host from among the plurality of memory areas in the plurality of memory devices, wherein a first memory device, from among the plurality of memory devices, is configured to receive at least a portion of the mapping information from the switch circuit, and perform a refresh operation on a plurality of first memory areas in the first memory device, based on at least the portion of the mapping information.


