Memory Subsystem Power-On Refresh Decision Logic

Solution Overview

Problem

Conventional memory sub-systems face challenges in determining whether to perform a full-memory refresh during power-on, leading to either unnecessary refreshing or degraded system performance due to high read-retry trigger rates, affecting customer experience and memory reliability.

Innovation Solution

A processing device within the memory sub-system detects the read-retry trigger rate after power-on and decides whether to perform a full-memory refresh based on an acceptable threshold criterion, avoiding an all-or-nothing approach by determining if the trigger rate is within specified limits, thus optimizing refresh operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a full-memory refresh is always performed during power-on, then memory reliability is improved, but system throughput and customer experience deteriorate due to unnecessary refreshing

Engineering Contradiction:

Improvememory reliabilityVSAvoidsystem throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent changes the parameter of refresh operation from a fixed binary decision (always refresh or never refresh) to a dynamic decision based on the read-retry trigger rate parameter. The controller monitors the read-retry trigger rate and adjusts the refresh operation accordingly, performing full-memory refresh only when the trigger rate exceeds a threshold, thereby optimizing both reliability and throughput

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the controller continuously monitors the read-retry trigger rate during power-on and uses this feedback to decide whether to perform a full-memory refresh. This closed-loop control ensures that refresh operations are performed only when necessary, balancing reliability and system performance

Inventive Principle:

Principle #23Feedback

2Productivity

If a full-memory refresh is never performed during power-on, then system throughput is improved, but memory reliability deteriorates due to high read-retry trigger rates

Engineering Contradiction:

Improvesystem throughputVSAvoidmemory reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the parameter of refresh operation from a fixed binary decision (always refresh or never refresh) to a dynamic decision based on the read-retry trigger rate parameter. The controller monitors the read-retry trigger rate and adjusts the refresh operation accordingly, performing full-memory refresh only when the trigger rate exceeds a threshold, thereby optimizing both reliability and throughput

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the controller continuously monitors the read-retry trigger rate during power-on and uses this feedback to decide whether to perform a full-memory refresh. This closed-loop control ensures that refresh operations are performed only when necessary, balancing reliability and system performance

Inventive Principle:

Principle #23Feedback

3Reliability

If full-memory refresh is performed unnecessarily, then memory reliability is maintained, but memory cell wear increases

Engineering Contradiction:

Improvememory reliabilityVSAvoidmemory cell lifespan

Core Design Contradiction:

ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent changes the parameter of refresh operation from a fixed binary decision (always refresh or never refresh) to a dynamic decision based on the read-retry trigger rate parameter. The controller monitors the read-retry trigger rate and adjusts the refresh operation accordingly, performing full-memory refresh only when the trigger rate exceeds a threshold, thereby optimizing both reliability and throughput

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the controller continuously monitors the read-retry trigger rate during power-on and uses this feedback to decide whether to perform a full-memory refresh. This closed-loop control ensures that refresh operations are performed only when necessary, balancing reliability and system performance

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS11756635B2Decision for executing full-memory refresh during memory sub-system power-on stage

Publication Date: 2023.09.12 MICRON TECHNOLOGY INC

AI summary

A system comprises a plurality of memory devices storing a set of codewords and a processing device, operatively coupled to the plurality of memory devices, to perform operations including: detecting a power-on of the system; determining a read-retry trigger rate (TR) based on reading a subset of the codewords during a time interval directly after actual initialization of the plurality of memory devices, wherein the time interval includes a time period before entering a normal operating mode, and no full-memory refresh operation is performed during the normal operating mode; determining whether the TR satisfies a threshold criterion; and in response to the TR not satisfying the threshold criterion, initializing the full-memory refresh operation of the plurality of memory devices.