Semiconductor Memory Refresh Voltage Control
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Solution Overview
Problem
Semiconductor memory devices with dynamic cells face challenges in reducing power consumption during refresh operations due to leakage currents, necessitating frequent data refresh cycles, especially in mobile devices where power efficiency is critical.
Innovation Solution
A semiconductor memory device and refresh method that include a memory cell array, sense amplifier, and sense amplifier control circuit, where a first voltage is supplied during a refresh period, and a second voltage with a different level is sequentially applied during a longer second refresh period to optimize data restoration and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh operations are performed frequently to maintain data integrity in dynamic memory cells, then data retention is improved, but power consumption increases
Solution Approach 1:
The patent implements a multi-stage refresh approach where the refresh period is divided into multiple sub-periods with different voltage levels. During the first sub-period, a first voltage level is applied to perform initial data restoration. During the second sub-period, a second voltage level is applied to complete the restoration. This periodic action with varying voltage levels allows effective refresh while reducing overall power consumption compared to continuous high-voltage refresh operations.
Solution Approach 2:
The patent changes the voltage parameter during the refresh operation by applying different voltage levels at different time stages. The voltage level is dynamically adjusted based on the refresh stage, allowing optimal balance between data restoration effectiveness and power consumption. This parameter change enables the system to achieve reliable data retention without maintaining continuously high power levels.
2Device complexity
If a single voltage level is applied during refresh operations, then the circuit design is simple, but data restoration efficiency is insufficient
Solution Approach 1:
The refresh operation is divided into multiple periodic stages with different voltage levels. The sense amplifier control circuit is configured to apply a first voltage level during a first time period and a second voltage level during a second time period. This periodic action with varying voltage levels significantly improves data restoration efficiency compared to single-voltage approaches, while the control circuit maintains manageable complexity through systematic voltage switching.
Solution Approach 2:
The patent introduces dynamic voltage switching during the refresh operation. The voltage level applied to the sense amplifier is not static but changes over time according to the refresh stage. This dynamic approach allows the system to optimize restoration efficiency at each stage while the control circuit manages the transitions, achieving a balance between complexity and performance.
3Use of energy by moving object
If the refresh period is extended to reduce refresh frequency, then power consumption is reduced, but data retention reliability may be compromised
Solution Approach 1:
The patent extends the refresh period by implementing a multi-stage refresh process with different voltage levels at different time periods. The first voltage level is applied during a first time period and the second voltage level during a second time period within the extended refresh cycle. This approach allows the refresh frequency to be reduced (lowering power consumption) while maintaining data retention reliability through the staged restoration process that ensures complete data recovery within the extended period.
Solution Approach 2:
The patent changes the voltage parameter over the extended refresh period to maintain data integrity. By applying different voltage levels at different stages of the extended refresh cycle, the system achieves effective data restoration even with less frequent refresh operations. The parameter changes ensure that data retention reliability is maintained despite the extended period between refresh cycles.
Data Source
AI summary
A semiconductor memory device and a self-refresh method of the semiconductor memory device. The semiconductor memory device includes: a memory cell array including one or more memory cells; a sense amplifier connected to a sensing line and a complementary sensing line and sensing/amplifying data stored in the one or more memory cells; and a sense amplifier control circuit sequentially supplying a first voltage and a second voltage having different levels to the sense amplifier through the sensing line during a refresh operation.