Memory Region Identification for Permission Checking

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Solution Overview

Problem

Current data processing systems face inefficiencies in checking access permissions for memory access, particularly when dealing with large address ranges, as they typically require individual checks for each address, leading to performance and power consumption issues.

Innovation Solution

The introduction of a region identifying operation that outputs a region identifying value for a specified target address, allowing software to determine the storage region associated with the address range, thereby reducing the need for individual checks and enhancing performance by identifying whether all addresses in a range belong to the same storage region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If individual address permission checks are performed for each memory address in a range, then access permission accuracy is ensured, but processing time and power consumption increase significantly

Engineering Contradiction:
Improveaccess permission checking accuracyVSAvoidpermission checking time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The memory address space is segmented into multiple storage regions, each with uniform access permissions. Instead of checking each individual address, the system divides the address space into manageable segments (storage regions) and performs permission checks at the region level. This segmentation allows the system to check permissions for multiple addresses simultaneously by identifying which storage region a target address belongs to, thereby reducing the number of checks required while maintaining permission accuracy.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If individual address permission checks are performed for each memory address in a range, then access permission accuracy is ensured, but power consumption increases

Engineering Contradiction:
Improveaccess permission checking accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

By segmenting the memory address space into storage regions with uniform permissions, the system reduces the total number of permission checks required. Each storage region acts as a unified unit, allowing the system to determine permissions for multiple addresses within that region through a single check. This significantly reduces power consumption compared to checking each address individually, while maintaining the same level of permission checking accuracy.

Inventive Principle:
Principle #1Segmentation

3Productivity

If region identifying operation is implemented to speed up permission checking, then processing efficiency improves, but device complexity increases

Engineering Contradiction:
Improvepermission checking speedVSAvoidmemory attribute unit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory attribute unit is designed to perform multiple functions: it既可以 perform traditional individual address permission checks,又可以 perform region identifying operations to determine which storage region a target address belongs to. This multi-functionality allows the system to optimize permission checking by using region identification when appropriate, while maintaining backward compatibility with existing permission checking mechanisms. The region identifying operation leverages the existing storage region structure, adding functionality without requiring completely separate hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3105681B1Region identifying operation for identifying region of a memory attribute unit corresponding to a target memory address
Publication Date: 2021.10.20 ARM LTD
  • EP3105681B1 patent drawingFigure 1~2
  • EP3105681B1 patent drawingFigure 3
  • EP3105681B1 patent drawingFigure 4

AI summary

A data processing apparatus (2) has a memory attribute unit (7) having storage regions (9) for storing attribute data for controlling access to a corresponding memory address range by processing circuitry (4). In response to a target memory address, the processing circuitry (4) can perform a region identifying operation to output a region identifying value identifying which of the storage regions (9) of the attribute unit 7 corresponds to the target memory address. The region identifying value is made available to at least some software executed by the data processing apparatus (2). This can be useful for quickly checking access permissions of a range of addresses or for determining how to update the memory attribute unit.