Memory Region Partitioning for Unified Parameter Management

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Solution Overview

Problem

In memory devices, analog value variations over time due to factors like charge leakage and temperature distortions degrade readout performance, requiring complex characterization and management of each memory page separately, leading to increased memory overhead and computational complexity.

Innovation Solution

Partitioning memory into regions where all pages are written within a predefined maximum time interval, allowing characterization and management using a single set of parameters, and enabling storage parameter calculation based on a subset of pages, thereby reducing memory space and computational complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If each memory page is characterized and managed separately to account for analog value variations, then readout performance is maintained, but memory overhead and computational complexity increase

Engineering Contradiction:
Improvereadout performanceVSAvoidmemory overhead and computational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple memory pages into a single memory region and applies a unified set of storage parameters to all pages within that region. This is achieved by enforcing a maximum time interval constraint that ensures all pages in a region are written within a short time window, making their analog value variations similar enough to be managed collectively rather than individually.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the management approach from page-level parameters to region-level parameters. By defining storage parameters at the memory region level rather than at the individual page level, the system reduces the number of parameters that need to be tracked and managed, thereby reducing memory overhead and computational complexity while maintaining readout performance through the time interval constraint.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If storage operations are performed without time constraints, then storage flexibility is maximized, but analog value variations degrade readout performance

Engineering Contradiction:
Improvestorage flexibilityVSAvoidreadout performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces a dynamic time interval constraint that adapts to the storage operations being performed. The maximum time interval is defined relative to the writing time of pages in a memory region, creating a flexible yet constrained storage model that maintains analog value consistency while allowing reasonable storage flexibility.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent establishes the maximum time interval constraint in advance before storage operations begin. This preliminary definition of the time window allows the system to proactively manage analog value variations by ensuring all pages in a region are written within the acceptable time frame, preventing degradation before it occurs.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9021181B1Memory management for unifying memory cell conditions by using maximum time intervals
Publication Date: 2015.04.28 APPLE INC
  • US9021181B1 patent drawing
  • US9021181B1 patent drawing
  • US9021181B1 patent drawing

AI summary

A method includes accepting data for storage in a memory that is partitioned into multiple memory regions. A memory region is selected for storing the data. At least part of the data is stored in the selected memory region, subject to verifying that all the storage operations applied to the selected memory region are performed within a predefined maximum time interval.