Memory Address Remapping With ECC-Triggered Self-Repair
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Solution Overview
Problem
Existing memory devices face challenges in managing health and extending lifespan due to wear-out issues, which are exacerbated by the complexity and space requirements of using counters for tracking worn-out addresses, and the inefficiency of current self-repair mechanisms.
Innovation Solution
Implementing a built-in self-repair (BISR) feature that uses a magnetic tunnel junction (MTJ) mini-array to store a map table for mapping worn-out addresses without counters, employing a two-layer error correction code (ECC) to trigger self-repair and redirect access to spare pages, and optimizing error detection based on temperature and error thresholds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a counter is used to track worn-out addresses, then the memory device can monitor health and manage wear, but the device complexity and memory access time increase
Solution Approach 1:
The patent removes the counter mechanism from the memory device architecture. Instead of using a counter to track worn-out addresses, the system uses a map table stored in non-volatile memory that directly maps worn addresses to replacement locations, eliminating the need for incremental counting and associated complexity
Solution Approach 2:
The patent introduces a map table as an intermediary structure between the memory address space and the wear tracking mechanism. This map table stores mappings of worn addresses to replacement addresses, serving as a mediator that enables health monitoring without requiring complex counters or additional volatile memory resources
2Reliability
If a counter is used to track worn-out addresses, then the memory device can monitor health and manage wear, but the non-volatile memory space required increases significantly
Solution Approach 1:
The patent removes the counter mechanism that would require significant non-volatile memory space to store cumulative wear counts for all addresses. Instead, it uses a compact map table that only stores necessary mapping information for worn addresses
Solution Approach 2:
Rather than tracking every possible address with a counter (excessive action), the system only tracks and stores mapping information for addresses that have actually worn out (partial action). This selective tracking approach dramatically reduces the non-volatile memory space required while maintaining effective health monitoring
3Ease of repair
If traditional self-repair mechanisms are used, then worn-out addresses can be replaced, but the repair process introduces additional latency
Solution Approach 1:
The patent implements preliminary action by pre-configuring replacement memory locations and pre-establishing mapping relationships in the map table before wear occurs. When an address wears out, the system can immediately redirect access to the pre-identified replacement location without needing to perform complex real-time analysis or sequential repair operations, thus minimizing latency
Solution Approach 2:
The patent uses a mapping table that copies the address translation function from the traditional counter-based system. Instead of sequentially counting and processing wear events, the map table directly copies and stores the necessary address-to-address mappings, enabling O(1) lookup time for worn address redirection and eliminating the time penalty of traditional self-repair mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances memory device endurance by up to two orders of magnitude, reduces latency, and minimizes die size and power consumption through parallel operations and intelligent error management.
Implementation Method 1
employing a magnetic tunnel junction (MTJ) mini-array to store a map table for mapping worn-out addresses
Implementation Method 2
employing a two-layer error correction code (ECC) to trigger self-repair
Data Source
AI summary
The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes determining whether a first address for a page in a first memory region is mapped in a map table, setting a target address as a second address identified in the map table as being mapped to the first address, setting the target address as the first address, determining a number of bits that fail in each word of a plurality of first-layer error correction code (ECC) words for the target address, and adding the target address to the map table, writing-back contents from the target address to a repair address in the first memory region, and updating the map table by mapping the target address to the repair address.