Memory Remapping for Multiprocessor Data Transfer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current data transmission methods between processor elements in stream processors are inadequate for efficiently transferring massive amounts of multimedia data, as they are limited by the bandwidth of bus structures, which restricts the speed and efficiency of data transfer.
Innovation Solution
The implementation of memory remapping in a multiprocessor system, utilizing a switch manager to synchronize tasks and remap shared memory pages between processor elements, allowing data to be transferred directly between processors without the need for separate data transmission processes, thereby overcoming bandwidth limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If bus structure is used to transfer data between processor elements, then data transfer control is simplified, but transmission bandwidth is limited
Solution Approach 1:
The patent introduces memory remapping as an intermediary mechanism between processor elements. Instead of directly transferring data through a bus structure, the system remaps memory addresses to enable direct data access between processors, thereby increasing transmission bandwidth while maintaining control simplicity through the memory management unit.
2Quantity of substance
If memory remapping is implemented to transfer data directly between processors, then transmission bandwidth is increased, but device complexity increases
Solution Approach 1:
The memory management unit autonomously handles the memory remapping process without requiring manual intervention or complex control logic from the processor elements. The system self-manages address translation and data routing, thereby increasing transmission bandwidth while keeping the control mechanism relatively simple through automated memory management.
3Productivity
If processors perform independent tasks simultaneously, then processing efficiency is improved, but data synchronization becomes more difficult
Solution Approach 1:
The patent implements preliminary memory remapping actions before data processing begins. By pre-establishing memory address mappings between processor elements, the system enables independent task execution while automatically synchronizing data access through the remapped memory structure, thereby maintaining processing efficiency without excessive synchronization complexity.
Data Source
AI summary
Provided are a method and apparatus for efficiently transferring a massive amount of multimedia data between two processors. The apparatus includes a first local switch, which connects a virtual page of a first processor element to a shared memory page, a second local switch, which connects a virtual page of a second processor element to the shared memory page, a shared page switch, which connects a predetermined shared memory page of a shared physical memory to the first or second local switch, and a switch manager, which remaps a certain shared memory page of the shared physical memory that stores data of a task performed by the first processor element to the virtual page of the second processor element. Accordingly, since memory remapping is used, the massive amount of multimedia data can be transmitted by changing a method of mapping a memory, unlike a case when multimedia data is transmitted by using a memory bus.