Centralized Memory Repair Circuit for Defective Cell Detection

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Solution Overview

Problem

The challenge in integrated circuit manufacturing is the high discard rate of defective memory cells, which reduces yield and increases manufacturing costs, as existing methods require significant additional circuitry to compensate for defects, thereby reducing available memory or circuit area.

Innovation Solution

A circuit and method that utilize a self-repair state machine and a directory of defective memory cell locations, with electrically programmable fuses, to detect and repair defective memory cells by selecting redundant columns, reducing the need for extensive redundant circuitry and optimizing storage locations based on defect frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If redundant memory cells are selected to compensate for defective memory cells, then yield is improved, but the amount of circuitry required increases significantly

Engineering Contradiction:
ImproveyieldVSAvoidamount of circuitry
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple separate repair circuits into a single shared repair circuit that serves all memory blocks. The directory and repair circuit are centralized and common to all blocks, eliminating the need for duplicate repair circuitry in each block while maintaining the ability to repair defective cells across all blocks.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The repair circuit and directory are designed as universal components that can service multiple memory blocks simultaneously. The directory stores defect information for all blocks, and the repair circuit can be configured to repair defects in any block, making these components multi-functional rather than block-specific.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If redundant memory cells are added to compensate for defective memory cells, then yield is improved, but available memory area is reduced

Engineering Contradiction:
ImproveyieldVSAvoidavailable memory area
Core Design Contradiction:
ProductivityVSArea of moving object

Solution Approach 1:

By merging the repair resources into a shared infrastructure, the patent eliminates redundant repair circuitry that would otherwise occupy additional area in each memory block. The centralized directory and repair circuit consume minimal area compared to having dedicated repair circuits in each block.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If a directory of defective memory cell locations is implemented, then repair accuracy is improved, but device complexity increases

Engineering Contradiction:
Improverepair accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The directory is implemented as a single shared structure common to all memory blocks rather than multiple separate directories. This centralized approach maintains the ability to accurately track and repair defective cells across all blocks while minimizing the total area and complexity required for the directory structure.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8103919B1Circuit for and method of repairing defective memory
Publication Date: 2012.01.24 XILINX INC
  • US8103919B1 patent drawing
  • US8103919B1 patent drawing
  • US8103919B1 patent drawing

AI summary

A circuit for repairing defective memory of an integrated circuit is disclosed. The circuit includes blocks of memory; and interconnect elements providing data to each of the blocks of memory, where the interconnect elements enable coupling together the signals for programming the blocks of memory. The circuit also includes a directory of locations for defective memory cells of blocks of memory, where the directory of locations is common to the blocks of memory for storing locations of defective memory cells of the blocks of memory. Methods of repairing defective memory of an integrated circuit are also disclosed.