Semiconductor Memory Repair Circuit Layout Optimization

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Solution Overview

Problem

Conventional post-package repair (PPR) techniques for semiconductor memory devices require large layout areas due to the use of electrical fuse circuits, which complicates the layout and contradicts the need for increased fabrication density.

Innovation Solution

A repair circuit and method that utilizes an address generating unit, an address e-fuse box unit, a row/column selecting e-fuse unit, a row repair control unit, and a column repair control unit to selectively program and compare addresses to determine and address row or column defects, reducing the need for extensive layout space by using e-fuses for post-package repair.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional PPR techniques use electrical fuse circuits to repair defective memory cells, then package yield is improved, but layout area increases significantly

Engineering Contradiction:

Improvepackage yieldVSAvoidlayout area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the row repair circuit and column repair circuit into a unified structure that shares common components including the electrical fuse circuits, address decoding logic, and control units. This integration allows both row and column repair functions to coexist within a compact layout, significantly reducing the total area occupied by repair circuits while maintaining full repair capability for both row and column defects.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The repair circuit is designed with universal components that can serve multiple functions. The electrical fuse circuits can be programmed to repair either row defects or column defects based on the defect type. The address decoding logic and control units are configured to handle both row address and column address repair operations, making the circuit multi-functional and reducing the need for separate dedicated circuits for row and column repair.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Ease of repair

If electrical fuse circuits are used for post-package repair, then defect repair capability is improved, but layout complexity increases

Engineering Contradiction:

Improvedefect repair capabilityVSAvoidlayout complexity

Core Design Contradiction:

Ease of repairVSDevice complexity

Solution Approach 1:

The repair circuit is segmented into distinct functional modules: defect detection unit, address decoding unit, electrical fuse programming unit, and repair execution unit. Each module performs a specific function and can be independently designed and optimized. This segmentation simplifies the layout design process by allowing each module to be placed optimally without interfering with others, reducing overall layout complexity while maintaining comprehensive repair capability.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS7486577B2Repair circuit and method of repairing defects in a semiconductor memory device

Publication Date: 2009.02.03 SAMSUNG ELECTRONICS CO LTD

AI summary

A repair circuit and related method of repair are disclosed. In the repair circuit, row repair or column repair control units are selectively actuated to perform respective repair functions within a semiconductor memory device in relation to a commonly provided defective address. Both post-package defects and/or before package defects may be repaired in response to the defective address.