Memory Repair Controller Using Tag RAM for Partial Row Replacement
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Solution Overview
Problem
There is a need for an efficient method to repair defective memory cells in semiconductor memory devices, as conventional approaches often require redundant blocks that are underutilized, leading to inefficiencies in manufacturing and storage capacity.
Innovation Solution
A system comprising a memory controller, primary memory, and a repair controller with a tag RAM and auxiliary data RAM, which uses repair tags to determine the type and location of necessary repairs, allowing for selective use of redundant memory cells to replace defective ones, thereby optimizing memory access and storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant blocks of memory cells are provided to replace defective cells, then defective memory cells can be repaired, but manufacturing efficiency and storage capacity utilization deteriorate due to underutilization of redundant blocks
Solution Approach 1:
The patent applies partial action by implementing partial row repair, where only the defective portions of a memory row are repaired using redundant cells from the same row, rather than requiring complete row replacement. This allows the repair function to be performed with minimal use of redundant resources, improving manufacturing efficiency while maintaining the ability to repair defective cells.
Solution Approach 2:
The patent segments the repair process into two distinct modes: partial row repair for minor defects and complete row repair for major defects. This segmentation allows the system to optimize resource usage based on the severity of defects, using redundant blocks only when necessary, thereby improving both repair capability and manufacturing efficiency.
2Reliability
If redundant blocks of memory cells are provided to replace defective cells, then defective memory cells can be repaired, but storage capacity utilization deteriorates
Solution Approach 1:
The patent uses partial row repair to repair only the defective portions of memory rows rather than requiring complete row replacement. This partial action approach minimizes the consumption of redundant memory blocks, thereby maximizing storage capacity utilization while maintaining the ability to repair defective cells.
Solution Approach 2:
The patent recovers and reuses redundant memory cells within the same row for partial repairs, rather than discarding entire rows as conventionally done. This recovery approach allows redundant cells to be utilized more efficiently, improving storage capacity utilization while maintaining repair capability.
3Reliability
If conventional row replacement is used to repair defective cells, then defective memory cells can be repaired, but memory device size increases
Solution Approach 1:
The patent implements partial row repair that repairs only the defective portions of a row using redundant cells from the same row, rather than requiring complete row replacement. This reduces the need for additional redundant memory blocks, thereby reducing memory device size while maintaining repair capability.
Solution Approach 2:
The patent merges the repair function with the existing memory row structure by using redundant cells within the same row for partial repairs. This integration eliminates the need for separate redundant memory blocks, reducing memory device size while maintaining the ability to repair defective cells.
Data Source
AI summary
Methods, apparatus and systems pertain to performing READ, WRITE functions in a memory which is coupled to a repair controller. One such repair controller could receive a row address and a column address associated with the memory and store a first plurality of tag fields indicating a type of row/column repair to be performed for at least a portion of a row/column of memory cells, and a second plurality of tag fields to indicate a location of memory cells used to perform the row/column repair.