Memory Repair Decode Logic for Reducing Fuse Array Area
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Solution Overview
Problem
As semiconductor memory density increases, the size of fuse arrays and associated circuits required for memory repair grows, leading to increased power consumption and chip area, necessitating a reduction in fuse array size while maintaining repairability.
Innovation Solution
The implementation of a memory repair system using antifuse elements in a fuse array for storing repair information, with repair decode logic and control circuits that remap memory addresses to redundant memory units, allowing for efficient repair of defective memory locations using fewer antifuses by storing repair addresses in a compressed format.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the density of memory is increased, then memory capacity is improved, but the size of fuse arrays and associated circuits increases leading to greater chip area consumption and power consumption
Solution Approach 1:
The memory array is divided into multiple banks, with each bank having its own independent repair circuitry and fuse array. This segmentation allows each bank to be repaired independently, reducing the total fuse array size needed while maintaining high memory capacity across multiple banks.
Solution Approach 2:
The patent introduces a hierarchical repair architecture where repair information is organized in multiple dimensions - bank-level repair blocks and word-line-level repair registers. This multi-dimensional organization reduces the complexity and area of individual fuse arrays while maintaining comprehensive repair capability across the entire high-density memory array.
2Quantity of substance
If the density of memory is increased, then memory capacity is improved, but power consumption increases due to larger fuse arrays and associated circuits
Solution Approach 1:
Power consumption is reduced by segmenting the repair system into bank-level and word-line-level components. Each segment operates independently with minimal circuitry, reducing total power consumption compared to a monolithic repair system for high-density memory.
Solution Approach 2:
The patent extracts and eliminates redundant circuitry from the repair system. By using a streamlined repair block design with shared resources and compact encoding schemes, unnecessary circuits are removed, reducing power consumption while maintaining repair functionality for high-density memory.
3Reliability
If larger fuse arrays are used to maintain yield, then repairability is improved, but device complexity and chip area increase
Solution Approach 1:
Multiple repair functions are merged into a single repair block structure. The repair block combines address latching, decoding, and switching functionality, reducing device complexity while maintaining comprehensive repairability for high-density memory arrays.
Solution Approach 2:
The repair block is designed as a universal component that can repair any word line in its associated bank through configurable address latching and decoding. This multi-functional design eliminates the need for dedicated repair circuits for each word line, reducing overall device complexity while maintaining full repairability.
Data Source
AI summary
Apparatuses and methods for storing redundancy repair information for memories are disclosed. An example apparatus includes a fuse array, a repair plane, and a decode logic and control circuit. The fuse array stores repair information that includes repair commands and load repair addresses. The load repair addresses include a respective repair address. The repair plane includes a block of memory and repair logic. The block of memory includes a plurality of redundant memory and the repair logic includes a plurality of repair blocks. Each repair block is associated with a respective one of the plurality of redundant memory and each repair block of the plurality of repair blocks stores a repair address. The decode logic and control circuit reads the repair information and decodes the repair commands, and loads repair addresses into the plurality of repair blocks based at least in part on the decoded repair commands.