Memory Repair During Program Execution

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Solution Overview

Problem

Existing methods for repairing faulty memory locations in a memory require a separate operating mode, which can interrupt the normal operation of a computer and compromise the reliability of controlling technical devices.

Innovation Solution

A method that allows for the simultaneous detection and repair of faulty memory locations while a program for controlling a technical device is being executed, utilizing error-detecting and error-correcting codes, and 'margin read' methods, without requiring a separate operating mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate operating mode is used for detecting and repairing faulty memory locations, then the memory can be reliably checked and repaired, but the normal operation of the computer is interrupted

Engineering Contradiction:
Improvememory reliabilityVSAvoidoperational interruption time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the memory repair function with the normal program execution by integrating error detection and correction operations into the existing program processing flow. The control unit performs margin read operations and error correction during regular operation cycles, combining what were previously separate functions into a unified operational mode that maintains both memory reliability and continuous system operation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent enables continuous memory monitoring and repair by performing error detection and correction operations during normal program execution without interrupting the computational workflow. The control unit continuously checks memory locations while processing programs, ensuring uninterrupted useful action in both memory maintenance and computational tasks.

Inventive Principle:
Principle #20Continuity of useful action

2Measurement precision

If error-detecting and error-correcting codes are used to detect faulty memory locations, then the detection accuracy is improved, but the number of bits required for protecting memory locations increases

Engineering Contradiction:
Improvefaulty memory location detection accuracyVSAvoidnumber of protective bits
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent applies margin read operations that read memory locations with slightly reduced read voltages to detect deteriorating memory cells. This localized quality check approach allows detection of faulty locations without requiring extensive protective coding across the entire memory, as the margin read technique selectively identifies problematic cells based on their reduced voltage margins rather than requiring redundant bits for all locations.

Inventive Principle:
Principle #3Local quality

3Reliability

If the memory is checked continuously during program execution, then the operational reliability is improved, but the processing speed of the program is reduced

Engineering Contradiction:
Improveoperational reliabilityVSAvoidprogram processing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent implements periodic margin read operations at strategically selected intervals during program execution rather than continuous checking at every memory access. The control unit performs error detection at periodic checkpoints while allowing normal high-speed operation between checks, balancing reliability monitoring with processing speed by using periodic rather than continuous verification.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20250130893A1Method for repairing faulty memory locations of a memory
Publication Date: 2025.04.24 ROBERT BOSCH GMBH
  • US20250130893A1 patent drawing

AI summary

A method for repairing faulty memory locations of a memory while a program from the memory is being executed by a computer. The program controls a technical device. When the program is being executed, addresses of faulty memory locations in the memory and correct values of the faulty memory locations are detected. The program provides time periods for repairing the faulty memory locations. The time periods are selected such that the control of the technical device is not hindered. For the repair, the correct values are written to the faulty memory locations.