Semiconductor Memory Repair Fuse Circuit Design

Solution Overview

Problem

The increasing number of memory cells in semiconductor memory devices leads to a higher likelihood of defective cells, resulting in reduced production yield due to the need for redundancy and additional fuse circuits, which complicates the design and increases size, making it difficult to miniaturize the devices.

Innovation Solution

A semiconductor memory device design that programs repair target addresses and additional data information in the same repair fuse circuit, eliminating the need for separate fuse circuits to program data information, thereby reducing the overall size and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate fuse circuits are added to program data information, then the functionality is improved, but the device size and complexity increase

Engineering Contradiction:

ImprovefunctionalityVSAvoidcomplexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the repair target address programming function and the data information programming function into a single repair fuse circuit. The fuse circuit receives both repair target addresses and data information through the same programming interface, eliminating the need for separate fuse circuits and reducing overall device complexity while maintaining full functionality.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The repair fuse circuit is designed to perform multiple functions: it can program repair target addresses for defective memory cell replacement and simultaneously program data information for other device functions. This multi-functional approach allows a single circuit to replace what would traditionally require separate dedicated circuits, reducing complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If separate fuse circuits are added to program data information, then the functionality is improved, but the device size increases

Engineering Contradiction:

ImprovefunctionalityVSAvoidsize

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the repair target address programming function and the data information programming function into a single repair fuse circuit. The fuse circuit receives both repair target addresses and data information through the same programming interface, eliminating the need for separate fuse circuits and reducing overall device complexity while maintaining full functionality.

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If redundancy memory cells are added to replace defective cells, then the reliability is improved, but the device size increases

Engineering Contradiction:

ImprovereliabilityVSAvoidsize

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The repair fuse circuit is designed to perform multiple functions: it can program repair target addresses for defective memory cell replacement and simultaneously program data information for other device functions. This multi-functional approach allows a single circuit to replace what would traditionally require separate dedicated circuits, reducing complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS8854904B2Semiconductor memory device

Publication Date: 2014.10.07 SK HYNIX INC

AI summary

A semiconductor memory device includes a plurality of repair fuse units configured to program repair target addresses respectively for repair target memory cells, wherein at least one of the repair fuse units is programmed with data information used for different purposes from the repair target addresses, a plurality of address comparison units each configured to compare an access target address with a corresponding address of the repair target addresses and determine whether to perform a repair operation or not, and a data transfer unit configured to transfer the data information to a corresponding circuit of the semiconductor memory device.