Memory Repair Data Multiplexing and Shadow Register Buffering
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Solution Overview
Problem
Conventional electronic circuits require multiple test cycles and handshaking logic to synchronize different clock frequencies for memory testing and repair, significantly increasing memory test and repair time.
Innovation Solution
The introduction of a multiplexer and shadow register system allows for simultaneous buffering and sequential transmission of memory repair data across different clock frequencies, eliminating the need for handshaking logic and reducing test cycles to a single cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If handshaking logic is used to synchronize different clock frequencies for memory testing, then frequency synchronization is achieved, but memory test and repair time significantly increases
Solution Approach 1:
A shadow register is introduced as an intermediary component between memory blocks operating at different clock frequencies. The shadow register captures and holds repair data from a first memory block operating at a first clock frequency, then transfers it to a fuse processor operating at a second clock frequency. This intermediary mechanism eliminates the need for complex handshaking logic while enabling asynchronous data transfer between different frequency domains, thereby reducing memory test and repair time.
2Reliability
If multiple test cycles are used for memory testing across different clock frequencies, then complete testing coverage is achieved, but test time increases
Solution Approach 1:
The shadow register performs preliminary action by capturing and buffering repair data from memory blocks operating at different clock frequencies before the fuse processor needs to process it. This preliminary capture allows repair data to be stored temporarily at its source frequency, then transferred in a single cycle to the fuse processor at its operating frequency, eliminating the need for multiple sequential test cycles and improving test efficiency.
3Reliability
If handshaking logic is implemented for frequency synchronization, then data transfer between different frequencies is coordinated, but device complexity increases
Solution Approach 1:
The shadow register serves as a simple intermediary that replaces complex handshaking logic. Instead of implementing coordinated handshaking protocols between multiple clock domains, the shadow register independently captures data at the source frequency and transfers it to the destination at the target frequency. This approach maintains reliable data transfer coordination while significantly reducing device complexity by eliminating the need for intricate synchronization logic.
Data Source
AI summary
An electronic circuit includes first and second circuits that include corresponding built-in-self-test (BIST) engines to perform memory testing operations on corresponding first and second memory block and generate first and second memory repair data. A multiplexer receives the first and second memory repair data and selectively transmits the first memory repair data during a first test cycle and the second memory repair data during a second test cycle. A shadow register buffers the first memory repair data during the first test cycle and a fuse processor sequentially receives and stores the first and second memory repair data during the second test cycle.