Memory Unit Initialization via Retention Registers
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Solution Overview
Problem
Power gating in integrated circuit (IC) devices causes loss of internal I/O processing settings such as trimming, redundancy, and security data, leading to time-consuming initialization processes when transitioning from low-power mode to normal operating mode.
Innovation Solution
Incorporating retention registers separate from the non-volatile memory array to store initialization data, allowing for rapid retrieval and initialization of the memory unit upon power restoration, reducing the need to read data from the memory array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power gating is used to conserve power in embedded flash memory, then power consumption is reduced, but initialization data is lost and initialization time increases
Solution Approach 1:
The patent applies preliminary action by storing initialization data in retention registers before power gating occurs. The controller saves trimming data, redundancy data, and security data from volatile registers to retention registers prior to entering low-power mode. This preliminary storage ensures that when power is restored, the data is already available in retention registers, eliminating the need for time-consuming re-initialization from the flash memory array.
2Speed
If initialization data is stored in volatile registers, then fast access is achieved during operation, but data is lost when power is gated
Solution Approach 1:
The patent introduces retention registers as an intermediary component between volatile registers and the non-volatile flash memory array. The retention registers serve as a buffer that maintains initialization data during power gating. The controller manages this intermediary by copying data from volatile registers to retention registers before power gating, and from retention registers back to volatile registers after power restoration, thus preventing data loss while maintaining fast access capabilities.
3Reliability
If all initialization data is read from non-volatile memory array upon wakeup, then data integrity is ensured, but initialization process becomes time-consuming
Solution Approach 1:
The patent applies preliminary action by pre-copying initialization data from the non-volatile memory array to retention registers during the initial power-on or before power gating. This preliminary transfer ensures data integrity is established in the retention registers, which are then used during wake-up operations. This eliminates the need to re-read data from the slow non-volatile memory array during time-critical wake-up sequences.
Solution Approach 2:
The patent segments the initialization data storage into two distinct locations: retention registers for fast wake-up operations and the non-volatile memory array for permanent storage and initial programming. This segmentation allows the system to use the appropriate storage location based on the operational context - retention registers during normal and low-power mode transitions for speed, and the memory array for initial data loading and permanent storage.
Data Source
AI summary
Embodiments of a method for operating a computer system are disclosed. In one embodiment, the memory unit has a non-volatile memory array and processing logic and the non-volatile memory array stores initialization data that is used by the processing logic to perform input/output operations of the memory unit. The method involves storing the initialization data in retention registers within the memory unit, wherein the retention registers are separate from the non-volatile memory array and retain data while the memory unit is power gated, using the stored initialization data in the retention registers to initialize the memory unit upon exiting the power gating.