Memory Riser Subsystem Segmentation for Capacity Expansion
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Solution Overview
Problem
As the number of DIMMs per memory channel increases, memory system performance degrades due to increased loads, via-trace coupling, trace-trace coupling, and insertion loss, leading to a decrease in memory channel bandwidth.
Innovation Solution
A computing system utilizing a riser card sub-system that splits the data channel into sub-channels and includes a command and address buffer to reduce loading, allowing multiple DIMMs to be accessed through a single connector without decreasing memory channel speed, thereby expanding memory capacity while maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of DIMMs per memory channel is increased, then memory capacity is expanded, but memory channel bandwidth degrades due to increased loads, via-trace coupling, trace-trace coupling, and insertion loss
Solution Approach 1:
The data channel is segmented into multiple sub-channels (e.g., first data sub-channel and second data sub-channel), with each sub-channel connecting to a specific DIMM. This segmentation allows multiple DIMMs to be accessed simultaneously through separate data paths, preventing the bandwidth degradation that would occur if all DIMMs shared a single data channel. The command and address channel is also segmented with separate buffers for different DIMMs, further reducing loading effects.
Solution Approach 2:
Command and address buffers are introduced as intermediary components between the memory controller and multiple DIMMs. These buffers temporarily store command and address signals, reducing the loading effect on the command and address channel when multiple DIMMs are accessed. This intermediary mechanism allows the system to maintain signal integrity and bandwidth while supporting increased memory capacity.
2Quantity of substance
If multiple DIMMs are connected to a single memory channel, then memory capacity increases, but system performance decreases due to increased loading
Solution Approach 1:
The memory system is segmented into independent access paths, where each DIMM has its own data sub-channel and dedicated buffer resources. This segmentation ensures that accessing one DIMM does not significantly load the resources needed for accessing other DIMMs, maintaining system performance while increasing capacity.
Solution Approach 2:
Command and address buffers are used to pre-process and temporarily store command and address signals before they are distributed to multiple DIMMs. This preliminary action reduces the immediate loading effect on the command and address channel, allowing the system to maintain reliable performance when multiple DIMMs are connected.
Data Source
AI summary
A computing system having a memory riser sub-system. The computing system includes a motherboard with a memory module connector and a riser card inserted into the first memory module connector. A first mezzanine card is connected to the riser card. The first mezzanine card includes a first mezzanine memory module connector for a first memory module and a second mezzanine memory module connector for a second memory module. A memory channel electrically connects the memory controller to the first mezzanine memory module connector and the second mezzanine module connector via the motherboard, the first riser card and the first mezzanine card. The memory channel may be divided into a first data sub-channel connected to the first mezzanine memory module connector and a second data sub-channel connected to the second mezzanine memory module connector.