Memory Row Access Concurrency for Power Efficiency
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Solution Overview
Problem
Existing memory systems require a large number of row requests to access both data and error detection and correction information, leading to inefficient power consumption.
Innovation Solution
Concurrently accessing a single data channel row and a single error detection and correction row, reducing the number of row requests from N+1 to two, thereby minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple data channels and error detection and correction channel are accessed concurrently, then data access efficiency is improved, but the number of row requests increases to N+1, leading to higher power consumption
Solution Approach 1:
The patent combines multiple error detection and correction channels into a single shared channel that serves multiple data channels. Instead of having separate error correction channels for each data channel (which would require N+1 row requests), the system merges them into one channel that can be accessed concurrently with data channels, reducing the total number of row requests to just 2 and thereby reducing power consumption while maintaining data access efficiency.
2Reliability
If a dedicated error detection and correction channel is provided for each data channel, then error detection capability is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent implements a universal error detection and correction channel that can serve multiple data channels simultaneously. This single channel performs the error detection and correction function for all data channels, eliminating the need for separate dedicated channels for each data channel. This reduces device complexity while maintaining comprehensive error detection capability across all data channels through shared resources.
3Loss of information
If N+1 row requests are made for data and error correction access, then complete data and error correction information is retrieved, but power consumption increases
Solution Approach 1:
The patent uses preliminary action by opening and caching the error detection and correction row in advance before actual data access occurs. The error correction row is pre-loaded into a cache, so when data needs to be accessed, the error correction information is already available in the cache rather than requiring a separate row request. This eliminates redundant row requests and reduces power consumption while ensuring complete error correction information is available when needed.
Data Source
AI summary
Data and error correction information may involve accessing multiple data channels (e.g., 8) and one error detection and correction channel concurrently. This technique requires a total of N+1 row requests for each access, where N is the number of data channels (e.g., 8 data row accesses and 1 error detection and correction row access equals 9 row accesses.) A single (or at least less than N) data channel row may be accessed concurrently with a single error detection and correction row. This reduces the number of row requests to two (2)—one for the data and one for the error detection and correction information. Because, row requests consume power, reducing the number of row requests is more power efficient.