Memory Row Backup Circuit for Row Hammer Protection
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Solution Overview
Problem
Existing memory devices are vulnerable to row hammer attacks, which cause charge leakage and bit flips, and frequent refreshing to prevent this leads to power consumption issues without data recovery.
Innovation Solution
A memory device with a protection circuit that identifies victim rows and backs up data to non-attacked rows, using a control circuit to transfer data to a second row, optionally compressing and encrypting it, thereby avoiding frequent refreshing and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory is refreshed frequently to prevent hammer attack, then data integrity is improved, but power consumption increases
Solution Approach 1:
The protection circuit performs preliminary actions by counting hammer attack triggers on each row before the actual data corruption occurs. When a row is identified as a victim row based on the trigger count threshold, the control circuit proactively backs up the data to a safe row, preventing data loss without requiring continuous frequent refreshing of the entire memory array.
2Reliability
If the memory is refreshed frequently to prevent hammer attack, then data integrity is improved, but storage needs increase
Solution Approach 1:
Instead of refreshing the entire memory array uniformly, the protection circuit applies local quality by identifying specific victim rows that have been hammer attacked and only backing up data from those rows. The protection circuit tracks which rows are affected and performs selective data migration only to those rows, reducing the overall storage burden compared to full memory refresh operations.
Data Source
AI summary
A memory device is disclosed. The memory device includes a memory array, a protection circuit, and a control circuit. The memory array includes several memory rows. The protection circuit is configured to determine a first row of the several memory rows to be a victim row. The control circuit is coupled to the memory array and the protection circuit, and the control circuit is configured to back up a data stored in the first row to a second row of the several memory rows. The victim row is hammer attacked.