Memory Row Error Tracking for Post-Package Repair Recommendations

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Solution Overview

Problem

Existing semiconductor memory devices lack comprehensive error correction mechanisms that provide transparent information on error locations and recommend timely post-package repairs, leading to potential safety issues in applications like automotive systems.

Innovation Solution

Implementing a system that stores per-row error information, including baseline and recent error data, and provides post-package repair recommendations based on error analysis, using ECC and ECS circuits to manage and correct errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction circuits periodically scan every memory cell to repair errors, then data integrity is improved, but the system provides limited information on error correction and when repairs should be performed

Engineering Contradiction:
Improvedata integrityVSAvoiderror correction information
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent segments error information storage by creating separate storage locations within the memory array: one set for baseline error information and another set for recent error information. This segmentation allows the system to maintain both types of data simultaneously without interference, enabling comprehensive error tracking while preserving data integrity through periodic ECS operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism (the dual storage system for baseline and recent error information) that mediates between the error correction circuits and the external system. This intermediary provides detailed error information and repair recommendations without requiring external systems to implement complex error tracking algorithms, thus maintaining reliability while preventing information loss.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If comprehensive error information is stored for every memory cell, then error analysis precision is improved, but device complexity increases

Engineering Contradiction:
Improveerror analysis precisionVSAvoidmemory structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by using the existing memory array structure to serve multiple functions: storing user data, storing baseline error information, and storing recent error information. By making the memory array multi-functional, the system achieves precise error analysis without adding separate dedicated storage structures, thus avoiding increased device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the parameter of information density within the memory array by storing different types of error information (baseline and recent) in different locations. This parameter change allows the system to maintain high error analysis precision by preserving detailed error data while managing device complexity through organized information distribution.

Inventive Principle:
Principle #35Parameter changes

3Ease of repair

If baseline error information is stored during manufacturing testing, then post-package repair accuracy is improved, but manufacturing time increases

Engineering Contradiction:
Improvepost-package repair accuracyVSAvoidmanufacturing time
Core Design Contradiction:
Ease of repairVSLoss of time

Solution Approach 1:

The patent implements preliminary action by storing baseline error information during manufacturing testing before the product reaches the customer. This preliminary capture of error data enables accurate post-package repair recommendations without requiring additional time during the manufacturing process, as the baseline information is collected as part of existing manufacturing test procedures.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12592294B2Apparatuses, systems, and methods for storing error information and providing recommendations based on same
Publication Date: 2026.03.31 MICRON TECHNOLOGY INC
  • US12592294B2 patent drawing
  • US12592294B2 patent drawing
  • US12592294B2 patent drawing

AI summary

Per-row recent and/or baseline error information for word lines may be stored along the word lines in some examples. In some examples, baseline error information may be stored in a fuse array. In some examples, the baseline error information may be loaded from the fuse array to a memory array. In some examples, based on the recent and/or baseline error information, the memory device may provide a post-package repair recommendation.