Memory Row Access Control With Random Threshold Row-Hammer Mitigation

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Solution Overview

Problem

Existing memory devices are vulnerable to row-hammer attacks, where external attackers exploit the threshold values to target specific memory cell rows, leading to decreased efficacy and disturbance of memory operations.

Innovation Solution

A memory device with a control logic circuit that includes a counter, random value generator, and comparator to generate and compare random threshold values, preventing attackers from determining the mitigation operations by using random threshold values that are dynamically adjusted based on access counts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fixed threshold values are used for mitigation operations, then the memory device can effectively refresh memory cell rows to prevent row-hammer events, but external attackers can obtain the threshold values and target specific memory cell rows for attacks

Engineering Contradiction:
Improverow-hammer mitigation effectivenessVSAvoidrow-hammer attacks
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies dynamics by making the threshold value changeable over time. The threshold value is updated periodically or based on access patterns, transforming it from a static parameter to a dynamic one. This prevents attackers from using fixed threshold values to predict and target specific memory cell rows, as the threshold continuously changes to new random values.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of the threshold value from a fixed constant to a variable that can take different random values. By introducing randomness and variability into the threshold parameter, the system prevents attackers from reliably determining which memory cell rows will trigger mitigation operations, thereby countering row-hammer attacks while maintaining security effectiveness.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If random threshold values are generated dynamically, then attackers cannot obtain the threshold values to perform targeted attacks, but the complexity of the control logic circuit increases

Engineering Contradiction:
Improverow-hammer attacksVSAvoidcontrol logic circuit
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces a random number generator as an intermediary component that produces random threshold values. This intermediary element adds minimal complexity to the control logic circuit while effectively preventing attackers from predicting threshold values. The random number generator acts as a mediator between the access count and the threshold comparison, introducing unpredictability without significantly complicating the overall system architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If mitigation operations are performed frequently to counter attacks, then the memory device can protect against row-hammer attacks, but the operational efficiency and efficacy of the memory device decreases

Engineering Contradiction:
Improvesecurity against attacksVSAvoidoperational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial action by performing mitigation operations selectively rather than continuously. The system only triggers mitigation operations when the access count reaches the random threshold value, avoiding unnecessary refresh operations. This selective approach maintains security by preventing row-hammer attacks while minimizing the impact on operational efficiency, as mitigation is performed only when potentially needed based on the random threshold comparison.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12488108B2Memory device and control method for controlling memory device
Publication Date: 2025.12.02 NAN YA TECH
  • US12488108B2 patent drawing
  • US12488108B2 patent drawing
  • US12488108B2 patent drawing

AI summary

A memory device and a control method of the memory device are provided. The memory device includes a memory array and a control logic circuit. The memory array includes a plurality of memory cell rows. The control logic circuit perform an access on the memory array. The control logic circuit counts a number of the access performed on the memory cell rows to generate a plurality of count values corresponding to the memory cell rows. When a count value corresponding to an accessed memory cell row among the memory cell rows is larger than or equal to a threshold value generated with random number corresponding to the accessed memory cell row, the control logic circuit arranges the memory cell rows nearby the accessed memory cell row into a mitigation operation.