Resistive Memory Row Repair and Local Reference Current Trimming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Resistive-type memory devices face issues with defective data and reference cells, varying read margins, and interference during read operations, necessitating reliable testing and repairing processes to ensure accurate data reading.
Innovation Solution
A method involving row and column repair, sense amplifier trimming, and local reference current adjustment to identify and replace defective cells, optimize read margins, and fine-tune reference currents for each row and column, using redundant rows and columns to maintain accurate data reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If row repair and column repair are performed to replace defective cells, then reliability of read operations is improved, but device complexity increases due to redundant rows and columns
Solution Approach 1:
The patent applies preliminary action by performing row repair and column repair during manufacturing testing before the memory device is shipped. Defective cells are identified and replaced with redundant cells in advance, so that the memory device is guaranteed to have no defective cells during normal operation. This preliminary repair action ensures reliability without requiring complex repair mechanisms during operation.
Solution Approach 2:
The patent uses copying by creating redundant rows and columns that are exact copies of the original data rows and columns. When a defective cell is detected, its data is copied to a corresponding location in the redundant row or column. The redundant structures serve as backup copies that can replace defective cells, ensuring data integrity without fundamentally changing the memory architecture.
2Measurement precision
If sense amplifier trimming is performed to optimize read margins, then measurement precision is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies parameter changes by trimming the sense amplifier parameters (such as threshold voltage or bias currents) during manufacturing testing to optimize the read margin for each memory device. By adjusting these electrical parameters, the sense amplifier is calibrated to achieve optimal discrimination between programmed and unprogrammed states, compensating for variations in manufacturing processes without requiring extremely tight manufacturing tolerances.
Solution Approach 2:
The patent uses feedback by measuring the actual read margin performance of each memory device during testing and using this measurement feedback to adjust the sense amplifier trimming parameters. The trimming process continuously monitors read operations and modifies sense amplifier characteristics based on the observed performance, creating a closed-loop system that optimizes read margin accuracy.
3Manufacturing precision
If local reference current trimming is performed to adjust reference currents for each row, then manufacturing precision is improved, but loss of time increases due to additional testing steps
Solution Approach 1:
The patent applies local quality by performing reference current trimming at the local row level rather than applying a global trim to all rows uniformly. Each row's reference current is independently adjusted based on its specific characteristics and defects. This localized approach allows precise compensation for row-to-row variations in reference current without requiring excessive trimming steps, as each row is trimmed only to the extent necessary for its specific requirements.
4Reliability
If multiple repair and trimming operations are performed, then reliability is improved, but productivity decreases due to extended testing and repair processes
Solution Approach 1:
The patent merges multiple repair and trimming operations into a single integrated manufacturing test and repair process. Row repair, column repair, sense amplifier trimming, and reference current trimming are performed in a coordinated sequence during one manufacturing testing campaign rather than as separate operations. This integration reduces the total time required by eliminating redundant setup and teardown between operations, while still ensuring all necessary repairs and optimizations are completed.
Solution Approach 2:
The patent performs all necessary repair and trimming operations as preliminary actions during manufacturing testing, completing them before the memory device enters production. By finishing row repair, column repair, sense amplifier trimming, and reference current trimming in advance, the device is guaranteed to meet reliability specifications without requiring any additional repair or adjustment steps during normal operation or field use, thereby maximizing manufacturing productivity.
Data Source
AI summary
A method for testing and repairing a memory device is provided. The memory device includes a memory array having data cells and reference cells arranged along cell rows and cell columns. The data cells are configured to store data, and the reference cells are configured to generate a reference current for reading the data stored in the data cells. The method includes: performing a row repair, to test the reference cells in each cell row, and to replace the cell row containing at least one defective reference cell by a redundant cell row comprising additional data cells and additional reference cells; and performing a local reference current trimming, to modify a ratio of an amount of the reference cells programmed with a low resistance state over an amount of the reference cells programmed with a high resistance state for at least one of the cell rows.