Memory Cell Access Control via Safe Address Mapping
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Solution Overview
Problem
The increasing integration of semiconductor memory devices leads to the cell hammer phenomenon, where memory cells leak charges and alter nearby memory rows, causing unintended data alterations, and existing hardware-based solutions are inefficient and may degrade performance.
Innovation Solution
A memory access control method using safe address mapping to set a subset of memory cells as enabled and the remainder as disabled, with the enabled cells spaced apart to prevent the cell hammer phenomenon, allowing for safe and normal memory modes without physical degradation of hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware-based solutions are used to prevent cell hammer phenomenon, then memory reliability is improved, but device complexity increases and performance degradation occurs
Solution Approach 1:
The patent divides the memory address space into multiple segments or regions, applying different access control policies to each segment. This segmentation allows the system to prevent cell hammer phenomenon in critical regions while maintaining normal access performance in other regions, thereby improving reliability without uniformly increasing device complexity across the entire memory system.
Solution Approach 2:
The patent implements localized protection by applying cell hammer prevention mechanisms only to specific memory regions or rows that are susceptible to the phenomenon, rather than enforcing protection across the entire memory device. This local quality approach maintains high reliability for protected regions while preserving normal performance characteristics for unprotected regions, avoiding unnecessary device complexity.
2Reliability
If hardware-based solutions are used to prevent cell hammer phenomenon, then memory reliability is improved, but productivity decreases due to performance degradation
Solution Approach 1:
The patent applies cell hammer prevention mechanisms partially rather than universally, activating protection only when and where needed based on detected access patterns or identified vulnerable regions. This partial action approach maintains high reliability for protected operations while minimizing the performance overhead, as not all memory operations are subjected to the full protection mechanism.
Solution Approach 2:
The patent implements dynamic protection that adapts to runtime conditions, adjusting the level of cell hammer prevention based on actual memory access patterns and system state. This dynamic approach allows the system to maintain high reliability when threats are detected while switching to high-performance mode when protection is not needed, thereby optimizing the balance between reliability and productivity.
3Reliability
If safe address mapping is applied to a desired region, then cell hammer phenomenon is prevented, but the number of usable memory cells is reduced
Solution Approach 1:
The patent applies safe address mapping and cell hammer prevention only to specific local regions of the memory device that are identified as vulnerable or critical, rather than protecting the entire memory space. This allows the system to maintain high reliability for protected regions while keeping unprotected regions fully available, thereby maximizing the total number of usable memory cells across the entire device.
Solution Approach 2:
The patent segments the memory address space into protected and unprotected regions, allowing selective application of safe address mapping. This segmentation enables the system to prevent cell hammer phenomenon in critical segments while maintaining full access capacity in non-critical segments, optimizing the balance between protection and usable memory quantity.
Data Source
AI summary
A memory access control method that can prevent a cell hammer phenomenon includes setting at least a part of all the memory cells a safe memory region, and setting the remaining memory cells to a normal memory region. In the safe memory region, some cells set to an enabled state are accessible for data writing or reading, and the remaining cells set to a disabled state are inaccessible. Based on a safe address mapping algorithm, access to all memory cells in the safe memory region is controlled such that access to the enabled memory cells is allowed and access to the disabled memory cells is prevented. The enabled memory cells in the safe memory region are spaced apart from each other by at least one disabled memory cell in a horizontal and/or vertical direction.