Memory Subsystem Read Write Scheduling via Data Bus Mode

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Solution Overview

Problem

Conventional memory sub-systems experience reduced data bus utilization due to frequent switches between read and write operations, leading to inefficiencies in data transmission and processing.

Innovation Solution

The scheduling of read operations and write operations is optimized based on the current data bus mode, prioritizing operations within available partition queues to minimize switches between read and write modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If read operations and write operations are processed without optimization, then the memory sub-system can handle various operations, but the data bus utilization is reduced due to frequent mode switches

Engineering Contradiction:
Improveoperation handling capabilityVSAvoiddata bus utilization
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent implements dynamic scheduling of read and write operations based on the current data bus mode. The system adaptively switches between processing read operations and write operations by maintaining separate queues (read queue and write queue) and selecting operations based on the current mode, thereby reducing unnecessary mode switches and improving data bus utilization while maintaining operational versatility

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent segments the operation processing into distinct read operations and write operations with separate queues. By dividing the monolithic operation queue into specialized sub-queues (read queue for read operations, write queue for write operations), the system can efficiently manage and schedule operations without frequent mode switching, thus resolving the contradiction between handling various operations and maintaining high data bus utilization

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the data bus frequently switches between read mode and write mode, then various operation sequences can be executed, but the throughput of the data bus is reduced

Engineering Contradiction:
Improveoperation sequence flexibilityVSAvoiddata bus throughput
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent ensures continuous useful action on the data bus by minimizing mode switches between read and write operations. By scheduling operations to maintain the current data bus mode as long as possible and only switching when necessary, the system maintains continuous data transmission without interruptions, thereby improving throughput while still supporting various operation sequences

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The system dynamically adjusts the scheduling of operations based on the current data bus mode. By implementing adaptive scheduling that responds to mode changes and prioritizes operations matching the current mode, the system maintains operational flexibility while maximizing throughput by reducing the frequency and impact of mode switches

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If read operations and write operations are processed in a first-come-first-served manner, then operational simplicity is maintained, but the number of mode switches increases

Engineering Contradiction:
Improveoperation processing simplicityVSAvoidmode switch frequency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent segments the operation processing by creating separate queues for read operations and write operations. This segmentation allows the system to maintain simplicity in queue management while reducing mode switches, as operations within each queue can be processed without changing the data bus mode. The separate queues preserve operational simplicity through standard FIFO processing while improving productivity by minimizing mode transitions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary classification of operations into read and write queues before processing. By pre-organizing operations according to their type (read or write) and placing them in appropriate queues, the system prepares for efficient scheduling that reduces mode switches. This preliminary action maintains ease of operation through straightforward queue management while setting up the structure to minimize unnecessary mode transitions during execution

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12314193B2Scheduling of read operations and write operations based on a data bus mode
Publication Date: 2025.05.27 MICRON TECHNOLOGY INC
  • US12314193B2 patent drawing
  • US12314193B2 patent drawing
  • US12314193B2 patent drawing

AI summary

A data bus coupled to a plurality of memory devices is determined to be in a read mode. Responsive to determining that the data bus is in the read mode, a particular read operation identified in a particular memory queue of memory queues that include identifiers of one or more write operations and identifiers of one or more read operations is determined. The particular memory queue includes a highest number of read operations for a memory device of the memory devices. The particular read operation is transmitted from the particular memory queue over the data bus.