Multi-Bank Memory Scheduling via Dedicated Queues
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Solution Overview
Problem
Conventional storage architectures using multi-bank low-latency random read memory (LLRRM) devices experience decreasing data access performance and increased latency as the number of banks and storage capacity increase, due to inefficient scheduling of access requests.
Innovation Solution
Implementing a queuing layer in the storage system that allocates request-queuing data structures to each memory bank, allowing access requests to be sent in successive order based on the idle state of the banks, thereby reducing idle time and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional storage architectures use multi-bank LLRRM devices with increased number of banks and storage capacity, then storage capacity increases, but data access performance decreases and latency increases
Solution Approach 1:
The patent segments the multi-bank LLRRM device into multiple independent request queues, with each queue dedicated to a specific memory bank. This segmentation allows the storage system to manage access requests bank-by-bank, preventing the performance degradation that occurs when requests are mishandled in a unified queue structure. Each bank can be accessed independently and simultaneously, maintaining high data access performance even as storage capacity increases through additional banks.
2Quantity of substance
If conventional storage architectures use multi-bank LLRRM devices with increased number of banks, then storage capacity increases, but access latency increases
Solution Approach 1:
The patent implements preliminary action by pre-allocating dedicated request queues to each memory bank before access requests arrive. This advance preparation ensures that when access requests come in, they can be immediately routed to the appropriate bank-specific queue without waiting for queue allocation or arbitration. This preliminary structuring of the queuing system minimizes access latency by eliminating setup delays and enabling immediate parallel processing across multiple banks.
3Device complexity
If access requests are sent sequentially to multi-bank LLRRM device, then implementation is simple, but memory bank idle time increases
Solution Approach 1:
The patent achieves continuity of useful action by implementing a scheduling mechanism that continuously monitors the state of each memory bank and dynamically routes access requests to banks that are currently idle or becoming idle. Instead of simple sequential sending that causes banks to wait idle, the system maintains continuous utilization of all banks by intelligently distributing requests across available banks. This keeps all memory banks actively processing requests rather than sitting idle, maximizing resource utilization without requiring overly complex scheduling logic.
Data Source
AI summary
Described herein are method and apparatus for scheduling access requests for a multi-bank low-latency random read memory (LLRRM) device within a storage system. The LLRRM device comprising a plurality of memory banks, each bank being simultaneously and independently accessible. A queuing layer residing in storage system may allocate a plurality of request-queuing data structures (“queues”), each queue being assigned to a memory bank. The queuing layer may receive access requests for memory banks in the LLRRM device and store each received access request in the queue assigned to the requested memory bank. The queuing layer may then send, to the LLRRM device for processing, an access request from each request-queuing data structure in successive order. As such, requests sent to the LLRRM device will comprise requests that will be applied to each memory bank in successive order as well, thereby reducing access latencies of the LLRRM device.