Memory Scrubbing Logic Circuit for Radiation Hardening

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Solution Overview

Problem

Existing memory devices, particularly those in high-radiation environments, face challenges in maintaining data integrity due to single-event upsets (SEUs) caused by radiation, which can lead to data errors and system failures. Current solutions like radiation shielding and error correction coding require complex modifications to the register transfer logic (RTL) and are costly and time-consuming to implement.

Innovation Solution

The implementation of a scrubbing technique for memory devices that embeds memory scrubbing at the memory device level, avoiding modifications to the RTL. This technique performs scrubbing during non-functional memory cycles, using a logic circuit integrated with the memory cells to read, validate, and correct data, thereby preventing data errors without interfering with normal operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If radiation shielding and error correction coding are implemented, then data integrity is improved, but device complexity and implementation cost increase

Engineering Contradiction:
Improvedata integrityVSAvoidRTL modification complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A dedicated scrubbing logic circuit is introduced as an intermediary component that operates between the memory array and the functional logic. This separate scrubbing module performs error detection and correction without requiring modifications to the existing RTL, thus maintaining data integrity while avoiding complexity in the functional logic path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The memory system is segmented into distinct functional components: the memory array, the scrubbing logic circuit, and the functional logic. The scrubbing operation is separated from normal read/write operations, allowing error correction to occur independently during non-functional cycles without interfering with or complicating the main functional path.

Inventive Principle:
Principle #1Segmentation

2Reliability

If scrubbing operations are performed during functional memory cycles, then data integrity is improved, but productivity decreases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory operation throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Scrubbing operations are performed periodically during non-functional memory cycles rather than continuously during functional cycles. The scrubbing logic monitors the functional logic for idle periods and executes error correction during these windows, ensuring data integrity while maintaining normal memory throughput during active operational cycles.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The scrubbing logic detects and corrects errors in advance during non-functional cycles before they can affect functional operations. By performing preliminary error correction during idle periods, the system ensures data integrity is maintained proactively without interrupting or slowing down productive memory operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250199955A1Random-access memory scrubbing
Publication Date: 2025.06.19 BAE SYSTEMS INFORMATION ANDELECTRONIC SYSTEMS INTEGRATION INC
  • US20250199955A1 patent drawing
  • US20250199955A1 patent drawing
  • US20250199955A1 patent drawing

AI summary

A memory device includes a memory module having a plurality of memory cells, a read port, a write port, and an output port; a first multiplexer having a functional read input, a scrub read input, a scrub read enable input, and a read request output, the read request output coupled to the read port; a second multiplexer having a functional write input, a scrub write input, a scrub write enable input, and a write request output, the write request output coupled to the write port; and a logic circuit configured to scrub, via the scrub write input, at least one of the memory cells based on the scrub read input while the scrub read enable input and/or the scrub write enable input are asserted.