Memory Searching Component Reduces Host Traversals

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Solution Overview

Problem

Existing memory systems face performance issues due to the need for frequent communication between the host and memory device, leading to increased memory accesses, data movement, and compute time, as well as cache pressure and potential failures in data retrieval.

Innovation Solution

A memory searching component (MSC) resident on the memory device performs search and retrieval operations, reducing the number of traversals between the host and memory device by issuing commands directly to the memory controller, thereby decreasing CPU cycles and cache pressure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the host performs search operations by issuing commands to the memory device, then data retrieval can be achieved, but the number of communication path traversals increases leading to increased memory accesses, data movement, and compute time

Engineering Contradiction:
Improvedata retrieval capabilityVSAvoidcompute time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

A memory searching component (MSC) is introduced as an intermediary between the host and memory device. The MSC resides on the memory device and performs search operations locally, eliminating the need for the host to traverse the communication path multiple times for search iterations. The host only needs to issue a single search command to the MSC, which then handles the search autonomously.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The search functionality is moved from the host dimension to the memory device dimension. Instead of the host performing searches through repeated communication traversals, the MSC on the memory device performs searches in parallel using local resources, effectively adding a new operational dimension where searches execute independently of host communication cycles.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the host performs search operations through multiple communication traversals, then data can be retrieved, but cache pressure increases due to frequent data movement

Engineering Contradiction:
Improvedata retrieval capabilityVSAvoidcache pressure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The MSC acts as an intermediary that handles search operations locally on the memory device, preventing unnecessary data movement to and from the host cache. By filtering and processing data locally, the MSC reduces the burden on the host cache system.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the host performs search operations by issuing multiple commands, then particular data can be retrieved, but the number of communication path traversals increases

Engineering Contradiction:
Improvedata retrieval capabilityVSAvoidsearch operation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The MSC is pre-configured on the memory device with search capabilities and data structures. When a search command arrives from the host, the MSC can immediately begin processing without requiring the host to issue multiple sequential commands. This preliminary preparation of search functionality on the memory device enables single-command search operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250068361A1Memory searching component
Publication Date: 2025.02.27 MICRON TECHNOLOGY INC
  • US20250068361A1 patent drawing
  • US20250068361A1 patent drawing
  • US20250068361A1 patent drawing

AI summary

An apparatus can include a memory device comprising a memory component and a memory controller that is coupled to the memory component. A memory searching component (MSC) is resident on the apparatus. The MSC can receive an external instruction indicative of performance of an operation to retrieve particular data from the memory component and issue, responsive to receipt of the instruction, a command to the memory controller to cause the memory controller to perform a read request invoking the memory component as part of performance of the operation in the absence of a further external instruction.