Non-volatile Memory Sector Erase Voltage Control

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Solution Overview

Problem

Conventional non-volatile semiconductor memory devices face inefficiencies and wear issues due to applying the same bulk voltage to multiple memory sectors, which can result in over-erasure or non-erasure, as sectors may have different 'erase pass voltages'.

Innovation Solution

The implementation of a non-volatile semiconductor memory device with separate bulk regions for each sector and bank voltage controllers that adjust voltages based on erase verification signals, allowing for distinct 'erase pass voltages' to be determined and applied to each sector during erase operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the same bulk voltage is applied to multiple memory sectors, then the erase operation structure is simple, but over-erasure or non-erasure occurs because sectors have different erase pass voltages

Engineering Contradiction:

Improveerase operation structureVSAvoiderase accuracy

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent divides the memory device into multiple sectors, each with its own dedicated bulk region and voltage controller. This segmentation allows independent voltage control for each sector, enabling precise erase operations without affecting other sectors. The bulk voltage generator is divided into multiple independent voltage controllers, one for each sector.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each memory sector is assigned its own bulk voltage level tailored to its specific erase characteristics. The system determines and applies different bulk voltages to different sectors based on their individual erase pass voltage requirements, ensuring optimal erase performance for each sector while avoiding over-erasure or non-erasure.

Inventive Principle:

Principle #3Local quality

2Reliability

If different bulk voltages are applied to each memory sector, then erase accuracy is improved, but the device complexity increases due to multiple voltage controllers

Engineering Contradiction:

Improveerase accuracyVSAvoidvoltage control structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The voltage control structure is segmented into multiple independent voltage controllers, with each controller dedicated to a specific sector. This segmentation enables independent voltage regulation for each sector while maintaining a modular and manageable architecture. Each voltage controller is responsible for generating and regulating the bulk voltage for its assigned sector only.

Inventive Principle:

Principle #1Segmentation

3Reliability

If erase operations are repeated with increased bulk voltage, then more failed cells are erased, but over-erasure and excessive wear occur

Engineering Contradiction:

Improveerase completenessVSAvoidover-erasure and wear

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The system dynamically adjusts the bulk voltage parameter for each sector based on its specific erase pass voltage characteristics. By determining the optimal voltage level for each sector through preliminary testing or characterization, the system achieves complete erasure of failed cells while maintaining the voltage at or below the threshold that causes over-erasure or excessive wear.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient erasure by preventing over-erasure and non-erasure of memory cells by determining and applying specific 'erase pass voltages' to each sector, thereby optimizing the erase process.

Implementation Method 1

a voltage difference is applied between the respective control gates and bulk region(s) of selected memory cells so that charges trapped in the respective floating gates of the selected memory cell are restored to the corresponding bulk region(s)

Methodology Applied

Scientific EffectElectrical field: Electric Field

Data Source

PatentUS7372733B2Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method

Publication Date: 2008.05.13 SAMSUNG ELECTRONICS CO LTD

AI summary

A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first mode erase operation, which determines different erase pass voltages for the respective memory sectors by successively increasing a bank voltage applied to each sector until the number of failed cells in each sector falls below a first failed cell threshold value, and a second mode erase operation, which applies the different erase pass voltages to the respective memory sectors for successively increasing periods of time until the number of failed cells in each sector falls below a second failed cell threshold value.